... | @@ -8,15 +8,15 @@ Signal paths have been optimized for low jitter and high frequency pulse repetit |
... | @@ -8,15 +8,15 @@ Signal paths have been optimized for low jitter and high frequency pulse repetit |
|
|
|
|
|
The card has been designed for generating a periodic gating signal for the [LHC Schottky Monitor](https://cds.cern.ch/record/2207308/files/mopmb060.pdf) at CERN. In this application it uses the LHC RF frequency (400.789 MHz) as an input clock and revolution frequency (11.245 kHz) as a trigger. In each turn it can be programmed to generate a pulse to enable a HMC547 fast gate in any of the 3564 bunch slots. The pulse width and delay can be adjusted to optimise the measurement. The two output channels provide independent gating of the horizontal and vertical systems of a single LHC beam.
|
|
The card has been designed for generating a periodic gating signal for the [LHC Schottky Monitor](https://cds.cern.ch/record/2207308/files/mopmb060.pdf) at CERN. In this application it uses the LHC RF frequency (400.789 MHz) as an input clock and revolution frequency (11.245 kHz) as a trigger. In each turn it can be programmed to generate a pulse to enable a HMC547 fast gate in any of the 3564 bunch slots. The pulse width and delay can be adjusted to optimise the measurement. The two output channels provide independent gating of the horizontal and vertical systems of a single LHC beam.
|
|
|
|
|
|
[![](/uploads/5501bc2d6ca25f5aed0b6f7054448e97/EDA-03339-V3-top_thumb.jpg)](/uploads/c2b4aca4eb2bc579d8af2e4a10e2d298/EDA-03339-V3-top.jpg)
|
|
[![](https://ohwr.org/project/fmc-del-1ns-2cha/uploads/5501bc2d6ca25f5aed0b6f7054448e97/EDA-03339-V3-top_thumb.jpg)](https://ohwr.org/project/fmc-del-1ns-2cha/uploads/c2b4aca4eb2bc579d8af2e4a10e2d298/EDA-03339-V3-top.jpg)
|
|
|
|
|
|
[![](/uploads/d67cf98a183dbd845abffc73b907c7f8/EDA-03339-V3-front_thumb.jpg)](/uploads/71088afdd6d29138e1703d4c343e960b/EDA-03339-V3-front.jpg)
|
|
[![](https://ohwr.org/project/fmc-del-1ns-2cha/uploads/d67cf98a183dbd845abffc73b907c7f8/EDA-03339-V3-front_thumb.jpg)](https://ohwr.org/project/fmc-del-1ns-2cha/uploads/71088afdd6d29138e1703d4c343e960b/EDA-03339-V3-front.jpg)
|
|
|
|
|
|
-----
|
|
-----
|
|
|
|
|
|
## Block diagram
|
|
## Block diagram
|
|
|
|
|
|
[![](/uploads/eb40d6640ea19e1be05553e3ea29ce0c/EDA-03339-diagram_thumb.png)](/uploads/d41cb9f3399480a33ce8a854324ccf15/EDA-03339-diagram.png)
|
|
[![](https://ohwr.org/project/fmc-del-1ns-2cha/uploads/eb40d6640ea19e1be05553e3ea29ce0c/EDA-03339-diagram_thumb.png)](https://ohwr.org/project/fmc-del-1ns-2cha/uploads/d41cb9f3399480a33ce8a854324ccf15/EDA-03339-diagram.png)
|
|
|
|
|
|
-----
|
|
-----
|
|
|
|
|
... | | ... | |