... | @@ -5,13 +5,14 @@ independently adjustable delay and pulsewidth. Pulses are triggered by a |
... | @@ -5,13 +5,14 @@ independently adjustable delay and pulsewidth. Pulses are triggered by a |
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common TTL input with adjustable threshold.
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common TTL input with adjustable threshold.
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The timing is synchronized either to an external 400 MHz reference clock
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The timing is synchronized either to an external 400 MHz reference clock
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or an internal VCXO (white rabbit compatible). Delay and pulsewidth can
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or an internal VCXO (white rabbit compatible). Delay and pulsewidth can
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be fine-adjusted with a resolution of 10 ps.
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be fine-adjusted with a resolution of 10 ps.
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Signal paths have been optimized for low jitter and high frequency pulse
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repetition rates.
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The circuit has been designed to generate trigger pulses for the
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The circuit has been designed to generate trigger pulses for the
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intra-bunch gating of the LHC Schottky monitor and will serve as a
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intra-bunch gating of the LHC Schottky monitor. It can also serve other
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replacement for the BOBR fine-delay functionality.
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projects as it is an excellent replacement for the BOBR fine-delay
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It has been optimized for low jitter and high frequency pulse repetition
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functionality.
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rates.
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