... | ... | @@ -28,13 +28,10 @@ rates. |
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|Channels|Two independently programmable output channels sharing a clock and trigger input.|
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|Signal connectors|SMA for all signals, can be replaced by LEMO 00 if required|
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|FMC connector|Low Pin Count (LPC), Vadj >= 2.5V|
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|Input signal level|**Clock**: 150mVpp to 2Vpp.
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**Trigger**: 5V maximum, adjustable input threshold.|
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|Output signal level|**Clock**: 800mVpp square wave.
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**Output**: TTL, outputs capable of driving a 50 Ohm load, > 2 V/ns slew rate|
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|Input signal level|**Clock**: 150mVpp to 2Vpp.<br/>**Trigger**: 5V maximum, adjustable input threshold.|
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|Output signal level|**Clock**: 800mVpp square wave.<br/>**Output**: TTL, outputs capable of driving a 50 Ohm load, > 2 V/ns slew rate|
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|Operating modes|TBC|
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|Maximum input clock frequency|1.2GHz to clock divider
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~200MHz after divider (for SVEC)|
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|Maximum input clock frequency|1.2GHz to clock divider<br/>~200MHz after divider (for SVEC)|
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|Minimum input clock frequency|100 MHz after divider|
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|Clock divider ratio|1..32|
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|Minimum input pulse width|Depends on input clock frequency (1x clock period)|
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|Trigger to output delay|TBC|
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|Timebase accuracy|±10ppm with onboard VCXO|
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|Delay accuracy|TBC|
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|Power consumption|**P3V3**: 1.5 A
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**P12V**: 50 mA|
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|Power consumption|**P3V3**: 1.5 A<br/>**P12V**: 50 mA|
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