|
|
# Project description
|
|
|
|
|
|
The FMC DEL 1ns 2cha *delay module* provides two TTL pulse-outputs with
|
|
|
independently adjustable delay and pulsewidth. Pulses are triggered by a
|
|
|
common TTL input with adjustable threshold.
|
|
|
The timing is synchronized either to an external 400 MHz reference clock
|
|
|
or an internal VCXO (white rabbit compatible). Delay and pulsewidth can
|
|
|
be fine-adjusted with a resolution of 10 ps.
|
|
|
independently adjustable delay and pulse width. Pulses are triggered by
|
|
|
a common TTL input with adjustable threshold.
|
|
|
The timing is synchronized either to an external reference clock or an
|
|
|
internal 125 MHz VCXO (white rabbit compatible). Delay and pulse width
|
|
|
can be fine-adjusted with a resolution of 10 ps.
|
|
|
Signal paths have been optimized for low jitter and high frequency pulse
|
|
|
repetition rates.
|
|
|
|
|
|
The circuit has been designed to generate trigger pulses for the
|
|
|
intra-bunch gating of the LHC Schottky monitor. It can also serve other
|
|
|
projects as it is an excellent replacement for the BOBR fine-delay
|
|
|
functionality.
|
|
|
repetition
|
|
|
rates.
|
|
|
|
|
|
[![](/uploads/70fd6c07579153eac741ec47c9ec3951/EDA-03339-top_thumb.jpg)](/uploads/ab55cd53b4ed8ff9b608189585e99a68/EDA-03339-top.jpg)
|
|
|
[![](/uploads/a87b6c9734d8553c2b1747cddd49dd6f/EDA-03339-front_thumb.jpg)](/uploads/c4adc3f773eb55be02dedad74265888a/EDA-03339-front.jpg)
|
... | ... | |