... | @@ -5,7 +5,7 @@ in FMC (FPGA Mezzanine Card) format. it uses an LPC VITA57 connector. |
... | @@ -5,7 +5,7 @@ in FMC (FPGA Mezzanine Card) format. it uses an LPC VITA57 connector. |
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The gain can be set by hardware (default = 1). A gain & offset
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The gain can be set by hardware (default = 1). A gain & offset
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self-calibrating function is also implemented. This function use a 1ppm
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self-calibrating function is also implemented. This function use a 1ppm
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20-Bit DAC
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20-Bit DAC
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[**AD5791**](http://www.analog.com/en/digital-to-analog-converters/da-converters/ad5791/products/product.html)
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[**AD5791**](http://www.analog.com/en/digital-to-analog-converters/da-converters/ad5791/products/product.html)
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as a reference and can be programmed as a differential voltage source.
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as a reference and can be programmed as a differential voltage source.
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The card also include a 8 input/output LVDS pairs and a 10-bit port
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The card also include a 8 input/output LVDS pairs and a 10-bit port
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digital IO with each single-bit port can be configured individually as
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digital IO with each single-bit port can be configured individually as
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