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## Technical Documentation
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## Technical Documentation
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### [Design Study](Documents/Design-study)
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### 2020
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Design study by [Sundance](https://www.sundance.com/) of an ADC mezzanine, 1 GSps, 8bits, 2 channels, based
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on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
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### [Preliminary study](Documents/Preliminary-study)
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- [Design Manual](Documents/Design-manual)
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Preliminary study of an ADC mezzanine, 1 GSps, 10bits, 2 channels based
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Design manual by [Sundance](https://www.sundance.com/) of an ADC mezzanine, 1 GSPS, 8bits, 2 channels, based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
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on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
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### 2019
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- [Design Study](Documents/Design-study)
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Design study by [Sundance](https://www.sundance.com/) of an ADC mezzanine, 1 GSPS, 8bits, 2 channels, based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
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- [Specification for 1 GSPS for OASIS](Documents/Specification-for-1-GSPS-for-OASIS)
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### [Specification for 1 GSPS for OASIS](Documents/Specification-for-1-GSPS-for-OASIS)
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### 2015 *(obsolete)*
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- [Preliminary study](Documents/Preliminary-study)
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Preliminary study of an ADC mezzanine, 1 GSps, 10bits, 2 channels based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
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### 2011 *(obsolete)*
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- [1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector](https://cds.cern.ch/record/2063663), M.Vasilyev, August 2015
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- Summer student work, design study. Other input ranges, one-channel. |