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# FPGA Resource Utilization (SVEC)
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## FMC ADC release 4.1 (no WR), Xilinx ISE 14.7
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|**Resource**|* Used *|* Available *|* Utilization *|
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|----|----|----|----|
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|Occupied Slices|4605|23038|19%|
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|Slice LUTs|11684|92152|12%|
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|Slice Registers|9482|184304|5%|
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|MUXCY|2856|46076|6%|
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|IOB|356|540|65%|
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|RAMB16BWER|138|268|51%|
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|RAMB8BWER|8|536|1%|
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|BUFIO2|3|32|9%|
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|BUFIO2FB|2|32|6%|
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|BUFG/BUFGMUX|7|16|43%|
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|ILOGIC2/ISERDES2|36|586|6%|
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|IODELAY2/IODRP2/IODRP2_MCB|46|586|7%|
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|OLOGIC2/OSERDES2|94|586|16%|
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|BUFPLL|2|8|25%|
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|BUFPLL_MCB|2|4|50%|
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|DSP48A1|8|180|4%|
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|MCB|2|4|50%|
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|PLL_ADV|5|6|83%|
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*note:** increase in on-chip RAM due to implementation of Feature
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\#1266
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-----
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## FMC ADC release 4.0 (no WR), Xilinx ISE 14.7
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|**Resource**|* Used *|* Available *|* Utilization *|
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|----|----|----|----|
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|Occupied Slices|4747|23038|20%|
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|Slice LUTs|11664|92152|12%|
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|Slice Registers|9478|184304|5%|
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|MUXCY|2760|46076|5%|
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|IOB|356|540|65%|
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|RAMB16BWER|38|268|14%|
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|RAMB8BWER|12|536|2%|
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|BUFIO2|3|32|9%|
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|BUFIO2FB|2|32|6%|
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|BUFG/BUFGMUX|7|16|43%|
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|ILOGIC2/ISERDES2|36|586|6%|
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|IODELAY2/IODRP2/IODRP2_MCB|46|586|7%|
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|OLOGIC2/OSERDES2|94|586|16%|
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|BUFPLL|2|8|25%|
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|BUFPLL_MCB|2|4|50%|
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|DSP48A1|8|180|4%|
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|MCB|2|4|50%|
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|PLL_ADV|5|6|83%| |