FMC ADC 100M 14B 4CHA Hardware Design
Overview
This project contains the information about the hardware for the fmc-adc-100m14b4cha project.
fmc-adc board version 3 front and top view.
Specifications
Versions
- Official production documentation of all versions (schematics, PCB, etc.): EDMS: EDA-02063
- Latest version: EDA-02063-V6-1
- see also FMC-ADC-100M ADC Power Noise Measurements - 21 January 2022 - suggestions improvements on V6-0
- see also V6-0 to V6-1 changes
Documentation
- Design notes
- Previous versions
- Measurement results
- 2017 and 2018 Integration and Measurement results
- FMC-ADC-100M Noise Measurements - 21 October 2019, 18 March 2020 on -V5 and -V6 versions
- FMC-ADC-100M ADC Power Noise Measurements - 21 January 2022 - suggestions improvements on V6-0
Support
We offer the following sources of support:
Contacts
Maintainers
- Erik Van der Bij - CERN
People involved
- Erik Van der Bij - CERN
- Maciej Fimiarz - ex-CERN
- Matthieu Cattin - CERN
Status
Date | Event |
---|---|
22-01-2010 | FmcAdc100M14b4cha upgrade. Design revised and modified, better parameters expected. |
10-02-2010 | New design made with 3 input ranges and programmable offset. |
04-03-2010 | Improvements made, responding to V1 design review. |
24-03-2010 | Design review of PCB layout V1 done. |
09-06-2010 | 3 assembled boards received. |
12-07-2010 | One board plugged in on Xilinx development kit and powered. Debugging start. |
30-07-2010 | ENOB & SNR measured: >11 bits in all ranges. |
08-09-2010 | Issue with linearity in the 30-90 kHz region caused by offset compensation circuit being investigated. |
29-09-2010 | Updates to PCB made (EDA-02063-V2). Ten boards ordered. Designer left CERN. |
07-01-2011 | Ten V2 boards arrived. |
04-07-2011 | V3 reviewed. V3 review. 3 prototypes will be built. V3 changelog. |
01-08-2011 | Price Enquiry sent out for first Open Hardware production. |
15-09-2011 | V4 design made. Corrected some textual problems and one BOM item order number. |
20-09-2011 | Order for 40 cards placed with INCAA Computers (V5). Delivery in January 2012. |
20-12-2011 | Measured bandwidth is 30 MHz. 40 MHz bandwidth is possible by changing 2 capacitors per channel. |
04-04-2012 | First production received: 40 V5 cards produced by INCAA Computers. |
24-03-2014 | Cards deployed in CERN's accelerator complex. Start of development to deployement: 4.5 year. |
22-04-2014 | CERN ordered 100 boards (V5-0) for delivery by 18/7/14 (20) and 19/9/14 (80). |
18-07-2014 | Received 20 pre-series boards. |
09-10-2017 | Detailed performance measurements made. |
09-10-2017 | Temperature drift and accuracy measurements made. |
21-10-2019 | FMC-ADC-100M Noise Measurements made to decide on alternative for obsolete L1 inductor. |
24-10-2019 | Power supply for -8V redesigned because of obsolescence of inductor. Many other minor issues handled in V6-0. |
18-03-2020 | Additional FMC-ADC-100M Noise Measurements made on -V6-0 board. ENOB of channel 1 improved by 0.3. |
24-01-2022 | Report written on possible improvements on V6-0. |
20-06-2022 | Design files have been updated to V6-1 (see V6-0 to V6-1 changes) and existing cards at CERN will be upgraded. |
Matthieu Cattin, Erik van der Bij - 20 June 2022