... | @@ -53,14 +53,20 @@ input. |
... | @@ -53,14 +53,20 @@ input. |
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## The schematics (V5) says that "VADJ must be set to 2.5V.", can't the fmc-adc work with VADJ = 3.3V?
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## The schematics (V5 and V6) says that "VADJ must be set to 2.5V.", can't the fmc-adc work with VADJ = 3.3V?
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The fmc-adc mezzanine will likely work on a carrier setting VADJ at 3.3V
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The fmc-adc mezzanine will likely work on a carrier setting VADJ at 3.3V (not tested).
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(not tested).
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This comment is outdated and should be replaced by a range of allowed values.
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This comment is outdated and should be replaced by a range of allowed
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values.
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The full comment in the schematics are:
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- VADJ must be set to 2.5V.
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- 2.5V has been choosen because:
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- there is no need of level matching for DAC SPI interface
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- FMC board could be tested with Xilinx kit, where VADJ is fixed to 2.5V
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So if you want to use another value of Vadj, this has to be studied seriously.
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Erik van der Bij, Matthieu Cattin - October 2014
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Erik van der Bij, Matthieu Cattin - March 2020
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