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FMC ADC 100M 14b 4cha - Gateware
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FMC ADC 100M 14b 4cha - Gateware
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dafa083e
Commit
dafa083e
authored
Nov 30, 2012
by
Matthieu Cattin
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Update user guide.
This was missing modification from the svn local copy...
parent
1fce251d
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fmcadc100m14b4cha_users_guide.tex
documentation/user_guides/fmcadc100m14b4cha_users_guide.tex
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documentation/user_guides/fmcadc100m14b4cha_users_guide.tex
View file @
dafa083e
...
...
@@ -69,6 +69,8 @@ Here's an overview of the fmcadc100m14b4cha board...
\subsection
{
Trigger
}
Software and/or hardware trigger. Internal or external hardware trigger, polarity selection.
Optional additional delay on the final trigger (in sampling clock ticks).
\begin{figure}
[h!]
\includegraphics
[width=\textwidth]
{
figures/trigger
_
unit.pdf
}
...
...
@@ -101,6 +103,7 @@ V\subscript{out} = V\subscript{in} - (gain\subscript{dac} \cdot V\subscript{dac}
\subsection
{
Time-stamping
}
%===============================================================================
\section
{
Acquisition
}
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@@ -253,6 +256,13 @@ Below is the pseudo-code to calculate the DAC corrected value, applying gain and
\begin{verbatim}
c
_
val = ((((val-0x8000+offset) << 15) * gain) >> 30)+0x8000
\end{verbatim}
where:
\begin{verbatim}
c
_
val = corrected value to write to DAC
val = value from user
offset = DAC offset calibration value from EEPROM
gain = DAC gain calibration value from EEPROM
\end{verbatim}
...
...
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