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# Overview
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Programmable hardware is increasingly deployed in large, physically
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distributed control systems.
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Hard real-time systems especially benefit from the determinism and low
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latency of purpose-built hardware.
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As reconfigurable hardware components replace traditional software-based
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systems,
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those hardware components must often communicate directly, over longer
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distances.
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While traditional protocols like CORBA and SOAP
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provide an excellent abstraction for software-to-software
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communication,
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they are a poor fit for hardware-to-hardware communication.
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Hardware components typically transfer information in read/write bus
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cycles
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as opposed to the procedure calling interfaces seen in software.
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The Etherbone protocol takes an existing bus standard (Wishbone)
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and extends this bus to run over the network.
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A concrete bus standard was chosen,
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because different bus protocols often differ enough that conversion
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reduces fidelity.
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Wishbone was chosen because it is an open standard, simple, and
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pipelining.
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The underlying transport protocol is left open,
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as Etherbone's requirements are easily met.
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This specification defines Etherbone for UDP and TCP.
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Etherbone's key features are:
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- Bus-cycle interface
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- Deterministic latency
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- Simple hardware implementation
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- Cut-through/wormhole operation
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- Compatible with software implementations
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- Separate config/control address space
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- Negotiable bus/address widths
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Etherbone leaves these issues to the lower transport layer:
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- Exactly once delivery (TCP or reliable layer 2)
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- Cut-through switching
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- Authentication (physical access or TLS)
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- Confidentiality
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Etherbone was designed for the following use cases:
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- High-precision system control
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- Sensor data acquisition
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- System diagnostics
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- Remote debugging
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- Distributed bus bridging
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# Architecture
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Etherbone (EB) connects two Wishbone (WB) buses together as shown in
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the figure below.
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The WB Intercon is a local bus, for example a crossbar interconnect.
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When a WB master wishes to write to a remote slave,
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it writes to the EB bridge,
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which is a local WB slave.
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The bridge, acting as an EB master,
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translates the request into an EB frame and routes it to
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the receiving EB slave.
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That slave decodes the request and executes the write over Wishbone.
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Finally, the WB interconnect routes the write to the correct slave.
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attached\_image
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Either or both of the devices may be replaced by software,
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as shown in the figure below.
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In this scenario,
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the operating system buffers and sends Etherbone frames as requested by
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the
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Etherbone software library.
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Client applications may use this library for remote access to
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any slave attached to an Etherbone equipped wishbone bus.
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This facilitates such tasks as debugging, firmware updates, and
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monitoring from a
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dekstop system.
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Applications may also attach devices to a virtual wishbone bus,
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perhaps to capture bus cycles or trigger an alarm.
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These virtual devices may be mapped into the Wishbone bus of other
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Etherbone nodes,
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hardware or software.
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attached\_image
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# Introduction
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# Introduction
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Etherbone is an FPGA-core that connects Ethernet to internal on-chip
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Etherbone is an FPGA-core that connects Ethernet to internal on-chip
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