... | @@ -20,7 +20,7 @@ project](www.artemis-emc2.eu). |
... | @@ -20,7 +20,7 @@ project](www.artemis-emc2.eu). |
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[![](/uploads/f80fd5f9747d4fdb111756d0c2bb9c44/EMC2_Top_S.jpg)](/uploads/f8ccfddb0cb065f737a51c674a940678/EMC2_Top.jpg)
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[![](/uploads/f80fd5f9747d4fdb111756d0c2bb9c44/EMC2_Top_S.jpg)](/uploads/f8ccfddb0cb065f737a51c674a940678/EMC2_Top.jpg)
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*EMC2-DP production board** - [block
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*EMC2-DP production board** - [block
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diagram](https://www.ohwr.org/5137)
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diagram](https://www.ohwr.org/project/emc2-dp/uploads/354be14274350ff21439eb578a129f25/emc2-dp_block_diagram.pdf)
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## Main Features
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## Main Features
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... | @@ -31,60 +31,6 @@ diagram](https://www.ohwr.org/5137) |
... | @@ -31,60 +31,6 @@ diagram](https://www.ohwr.org/5137) |
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- 96mm x 90 mm PC/104 Form-Factor with Cable-less Break-Out PCB
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- 96mm x 90 mm PC/104 Form-Factor with Cable-less Break-Out PCB
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Connector
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Connector
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Examples of other features that may be mentioned:
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- 4-lane PCIe (Gennum GN4124) *obsolete component, not available
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anymore*
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- 1x Xilinx Spartan6 FPGA (XC6SLX150T-3FGG900C)
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- FMC slot with low pin count (LPC) connector
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- Vadj fixed to 2.5V
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- FMC connectivity: all 34 differential pairs connected, 1 GTP
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transceiver with clock, 2 clock pairs, JTAG
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- No dedicated clock signals from Carrier to FMC (only available
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on HPC pins)
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- Simple clocking resources
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- 1x 10-280 MHz I2C Programmable XO Oscillator (Silicon Labs
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Si570)
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- 1x 25 MHz TCXO controlled by a DAC with SPI interface (AD5662,
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used by [White Rabbit PTP
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core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core\)))
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- 1x 20 MHz VCXO controlled by a DAC with SPI interface (AD5662,
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used by [White Rabbit PTP
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core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core\)))
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- 1x low-jitter frequency synthesizer (TI CDCM61004, fixed
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configuration, Fout=125MHz, used by [White Rabbit PTP
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core](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core\)))
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- On board memory
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- 1x 2Gbit (256 MByte) DDR3 (MT41J128M16JT-125)
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- 1x SPI 32Mbit flash PROM for multiboot FPGA powerup
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configuration, storage of the FPGA firmware or of critical data
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(M25P128-VMF6G)
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- Miscellaneous
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- on-board thermometer IC (DS18B20U+)
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- unique 64-bit identifier (DS18B20U+)
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- Front panel containing
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- 1x Small Formfactor Pluggable (SFP) cage for fibre-optic
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transceiver ([WhiteRabbit
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support](https://www.ohwr.org/project/white-rabbit)). 1.25 and
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2.5 Gbps.
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- Programmable Red and Green LEDs
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- FMC front panel
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- Internal connectors
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- 1x JTAG header for Xilinx programming during debugging
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- 1x mini USB AB (USB-UART bridge)
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- FPGA configuration. The FPGA can optionally be programmed from:
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- GN4124 SPRIO interface (loaded by software driver at startup)
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- JTAG header
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- SPI 32Mbit flash PROM
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- selectable by GN4124 GPIO. Default option would be loading via
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the SPI flash PROM (stand-alone applications).
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- Debugging features
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- mini USB connector
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- 4 LEDs
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- 2 buttons
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- Optimised for cost
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- 8-layer PCB
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## PXIe specific features
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## PXIe specific features
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\* PXI express form factor, 3U high, single slot
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\* PXI express form factor, 3U high, single slot
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