... | @@ -37,66 +37,23 @@ Guide](https://www.ohwr.org/project/emc2-dp/uploads/b7a0e6f301517515a89bd2535ef7 |
... | @@ -37,66 +37,23 @@ Guide](https://www.ohwr.org/project/emc2-dp/uploads/b7a0e6f301517515a89bd2535ef7 |
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- PCIe/104 OneBank Carrier for Trenz SoC Modules
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- PCIe/104 OneBank Carrier for Trenz SoC Modules
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- PCI Express Gen 2 compatible and integrate PCI Express switch
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- PCI Express Gen 2 compatible and integrate PCI Express switch
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- Infitive number of EMC2-DP can be stacked for large I/O solutions
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- Infinite number of EMC2-DP can be stacked for large I/O solutions
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- Expandable with any VITA57.1 FMC I/O Module for more flexibility
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- Expandable with any VITA57.1 FMC I/O Module for more flexibility
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- 96mm x 90 mm PC/104 Form-Factor with Cable-less Break-Out PCB
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- 96mm x 90 mm PC/104 Form-Factor with Cable-less Break-Out PCB
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Connector
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Connector
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## PXIe specific features
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##
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\* PXI express form factor, 3U high, single slot
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\* Clock and synchronisation back plane signals
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<table>
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<tbody>
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<tr class="odd">
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<td><strong>PXI clock and synchronisation signals</strong></td>
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<td><strong>PXI express clock and synchronisation signals</strong></td>
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</tr>
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<tr class="even">
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<td>PXI_TRIG[0:7]</td>
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<td>PXIe_DSTARA</td>
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</tr>
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<tr class="odd">
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<td>PXI_CLK10</td>
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<td>PXIe_DSTARB</td>
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</tr>
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<tr class="even">
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<td>PXI_STAR</td>
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<td>PXIe_DSTARC</td>
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</tr>
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<tr class="odd">
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<td>PXI_LBL6</td>
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<td>PXIe_CLK100</td>
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</tr>
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<tr class="even">
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<td>PXI_LBR6</td>
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<td>PXIe_SYNC100</td>
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</tr>
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</tbody>
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</table>
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-----
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-----
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## Project information
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## Project information
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- Official production documentation: [EDMS
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- Demonstration example
|
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EDA-02839](http://edms.cern.ch/nav/EDA-02839/)
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- [CERN specific information](CERN)
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- [Design Information](DesignInfo)
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- [Software](Software)
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- [Users](Users)
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- [Frequently Asked Questions](FAQ)
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Since the SPEXI is a board which is based on the design of the
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<!-- end list -->
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[SPEC](https://www.ohwr.org/project/spec/wiki), some of the
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documentation of the SPEC can also be used.
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- [Getting Started with the
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- [Users](Users)
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SPEC](https://www.ohwr.org/project/spec-getting-started/wiki)
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- [Frequently Asked Questions](FAQ)
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(project)
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- [SPEC Frequently Asked
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Questions](https://www.ohwr.org/project/spec/wikis/FAQ)
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-----
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-----
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|
... | @@ -109,7 +66,7 @@ documentation of the SPEC can also be used. |
... | @@ -109,7 +66,7 @@ documentation of the SPEC can also be used. |
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- Pre-release design documentation:
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- Pre-release design documentation:
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[SPEXI-V1.0.zip](https://www.ohwr.org/project/spexi/uploads/dd19b51611639085e51bd8c332f305e4/SPEXI-V1-0.zip)
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[SPEXI-V1.0.zip](https://www.ohwr.org/project/spexi/uploads/dd19b51611639085e51bd8c332f305e4/SPEXI-V1-0.zip)
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### FPGA examples (including the .ucf-file)
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### Demonstration example
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- [spexi\_simpledemo.zip](https://www.ohwr.org/project/spexi/uploads/aae580fa08bec2ca351fbf70d323f802/spexi_simpledemo.zip)
|
|
- [spexi\_simpledemo.zip](https://www.ohwr.org/project/spexi/uploads/aae580fa08bec2ca351fbf70d323f802/spexi_simpledemo.zip)
|
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The file **spexi\_simpledemo.zip** contains a demo design and all
|
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The file **spexi\_simpledemo.zip** contains a demo design and all
|
... | @@ -172,128 +129,8 @@ documentation of the SPEC can also be used. |
... | @@ -172,128 +129,8 @@ documentation of the SPEC can also be used. |
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<td><b> Event </b></td>
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<td><b> Event </b></td>
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</tr>
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</tr>
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<tr class="even">
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<tr class="even">
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<td>06-04-2011</td>
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<td>11-05-2017</td>
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<td>First ideas for project.</td>
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<td>Project added to https://www.ohwr.org.</td>
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</tr>
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<tr class="odd">
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<td>17-01-2012</td>
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<td>Price Enquiry sent out for design by industry based on [SPEC board](https://www.ohwr.org/project/spec/wiki).</td>
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</tr>
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<tr class="even">
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<td>12-03-2012</td>
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<td>Order for design and two pre-series boards placed with INCAA. Delivery by 12-07-2012.</td>
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</tr>
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<tr class="odd">
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<td>16-05-2012</td>
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<td>Schematics being made.</td>
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</tr>
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<tr class="even">
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<td>29-05-2012</td>
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<td>Removed SATA connectors and stand-alone possibility from specification.</td>
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</tr>
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<tr class="odd">
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<td>17-08-2012</td>
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<td>V0 Schematics and PCB uploaded and available for review</td>
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</tr>
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<tr class="even">
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<td>30-08-2012</td>
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<td>First review V0 [Review20120830](Review20120830).</td>
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</tr>
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<tr class="odd">
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<td>04-10-2012</td>
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|
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<td>Second schematics review V0.</td>
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</tr>
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<tr class="even">
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<td>19-11-2012</td>
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|
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<td>V0-2 ready for review.</td>
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</tr>
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<tr class="odd">
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<td>07-11-2012</td>
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|
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<td>V0-2 reviewed. Only one single minor comment.</td>
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</tr>
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<tr class="even">
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<td>21-01-2013</td>
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<td>Bare PCBs ready for assembly of components.</td>
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</tr>
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<tr class="odd">
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|
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<td>07-02-2013</td>
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|
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<td>PCBs should be assembled by 22 February 2013.</td>
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</tr>
|
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|
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<tr class="even">
|
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|
|
<td>07-03-2013</td>
|
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|
|
<td>Assembled PCB available. Production Test Software being written based on SVEC PTS.</td>
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</tr>
|
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|
|
<tr class="odd">
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|
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<td>28-06-2013</td>
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|
|
<td>V1-0 files being finalised. Ready in a week.</td>
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</tr>
|
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|
|
<tr class="even">
|
|
|
|
<td>02-07-2013</td>
|
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|
|
<td>V1-0 files ready for verification and cleanup by CERN design office.</td>
|
|
|
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</tr>
|
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|
|
<tr class="odd">
|
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|
|
<td>30-07-2013</td>
|
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|
|
<td>V1-0 files reviewed. Main comments about component spacing. Will clean up design.</td>
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</tr>
|
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|
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<tr class="even">
|
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|
|
<td>28-08-2013</td>
|
|
|
|
<td>Added PROM to design and cleaned up files. Will be checked by CERN design office. Ordered 10 boards.</td>
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|
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</tr>
|
|
|
|
<tr class="odd">
|
|
|
|
<td>03-09-2012</td>
|
|
|
|
<td>Prototype SPEXI board received (from base layout).</td>
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|
|
|
</tr>
|
|
|
|
<tr class="even">
|
|
|
|
<td>25-09-2013</td>
|
|
|
|
<td>Design V1-0 checked and improved. Released for production.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="odd">
|
|
|
|
<td>08-10-2013</td>
|
|
|
|
<td>Driver Fine Delay card ported from SPEC to SPEXI. Ready for testing. TDC driver will be ported next.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="even">
|
|
|
|
<td>03-12-2013</td>
|
|
|
|
<td>Labview Driver available for <a href="https://www.ohwr.org/project/fmc-delay-1ns-8cha/wiki">FMC DEL 1ns 4cha</a> and [FMC TDC 1ns 5cha](https://www.ohwr.org/project/fmc-tdc/wiki).</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="odd">
|
|
|
|
<td>30-01-2014</td>
|
|
|
|
<td>Series production of 10 cards received at CERN.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="even">
|
|
|
|
<td>30-04-2014</td>
|
|
|
|
<td>Ordered 25 boards.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="odd">
|
|
|
|
<td>04-06-2014</td>
|
|
|
|
<td>Airbus Defence&Space: Evaluating SPEXI for use as backbone for future test systems for space electronics.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="even">
|
|
|
|
<td>23-07-2014</td>
|
|
|
|
<td>Astrium GmbH, Germany, will use the SPEXI with the <a href="https://www.ohwr.org/project/fmc-adc-2k24b8cha/wiki">24 bit ADC</a> for measurements using PT1000.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="odd">
|
|
|
|
<td>31-07-2014</td>
|
|
|
|
<td>Received the 25 boards.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="even">
|
|
|
|
<td>04-09-2015</td>
|
|
|
|
<td>4 SPEXI boards with FMC-DEL cards have been deployed in the kicker control systems at CERN (LEIR and others).</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="odd">
|
|
|
|
<td>08-09-2015</td>
|
|
|
|
<td>A SPEXI boards with a FMC-TDC card is under study to be used.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="even">
|
|
|
|
<td>22-04-2016</td>
|
|
|
|
<td>Airbus Defence&Space is using the SPEXI as their backbone in test systems for space electronics.</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="odd">
|
|
|
|
<td>03-10-2016</td>
|
|
|
|
<td>The Ecole d'Ingénieurs in Fribourg will use the SPEXI</td>
|
|
|
|
</tr>
|
|
|
|
<tr class="even">
|
|
|
|
<td>29-03-2017</td>
|
|
|
|
<td>In SM18 the SPEXI will be used with a TDC for magnet quench trigger time stamping</td>
|
|
|
|
</tr>
|
|
</tr>
|
|
</tbody>
|
|
</tbody>
|
|
</table>
|
|
</table>
|
... | | ... | |