... | ... | @@ -170,12 +170,12 @@ at CERN, I think they are still valid and useful. |
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### Status registers
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1. Default value (everything normal) should be 0. So you can easily see
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4. Default value (everything normal) should be 0. So you can easily see
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if a bit is set.
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2. Unused bits: define as: "reserved, ignore on read". This allows
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5. Unused bits: define as: "reserved, ignore on read". This allows
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future upgrades of hardware that still will work with old software
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that doesn't know about added or hidden possibilities.
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3. Interrupt status register (showing the cause of an interrupt):
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6. Interrupt status register (showing the cause of an interrupt):
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actually the same as rule 1. But make the most significant bit an OR
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of all the other bits, likely combined with an interrupt mask
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register. With a single assembly instruction (check if negative) you
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... | ... | @@ -184,10 +184,10 @@ at CERN, I think they are still valid and useful. |
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### General
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1. Make that everything goes fast when things are OK (e.g with hint 6).
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7. Make that everything goes fast when things are OK (e.g with hint 6).
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To find out what was the cause of an error condition may take much
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more time.
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2. If possible, make that your hardware can continue without an
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8. If possible, make that your hardware can continue without an
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interrupt being handled. E.g. one can have a counter that would show
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how many interrupts it would have given when continued (e.g. number
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of packets sent, so the software can just check off many items in a
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... | ... | @@ -195,5 +195,5 @@ at CERN, I think they are still valid and useful. |
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-----
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Erik van der Bij, Maciej Lipinski - 26 September 2018
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Erik van der Bij, Maciej Lipinski - 6 May 2020
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