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-----
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## Documenting Design Reviews of Schematics
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## Documenting Schematics design reviews
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Standardising the way of documenting design reviews will help the ease
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of interpreting the comments. At CERN we came up with the following
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suggestions.
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### 1.- Sheet references
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Group the comments by schematic page that they belong to. Some check the
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Divide the review comments in the following sections:
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+ Schematics
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-- Sum of sheets of the schematics
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-- Schematics pages
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-- BOM
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+ Layout
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-- Power planes
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-----
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### Examples of design reviews of schematics
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## Examples of schematics design reviews
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Following above suggestions
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... | ... | @@ -89,7 +87,7 @@ Not following the above suggestions |
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-----
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## Examples of design reviews of firmware
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## Examples of firmware design reviews
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- VHDL design review of
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nanoFIP
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-----
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## Schematics review checklist
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## Schematics design review checklist
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### Create and study BOM, power and netlist
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### Create and study BOM, powerlist and netlist
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1. **Use as few different components as possible**.
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- A single BOM line is costing roughly 100-200 CHF (ordering,
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1. Buses: check if all bits are used.
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2. Differential signals: check if both \_P and \_N are used (and have
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really this polarity).
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3. Check each connection of ICs. Notably hard-wired settings of ICs
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3. Power signals naming: use P3V3, P5V, M12V etc.
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4. Check each connection of ICs. Notably hard-wired settings of ICs
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(division/amplification factors, operating modes etc. Add a note).
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4. Check polarity of capacitors, notably on those connected to negative
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5. Check polarity of capacitors, notably on those connected to negative
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power supplies.
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5. Check correct polarity of diodes and LEDs.
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6. Check if enough decoupling for each IC.
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7. Check global decoupling of power supplies (large cap at point of
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6. Check correct polarity of diodes and LEDs.
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7. Check if enough decoupling for each IC.
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8. Check global decoupling of power supplies (large cap at point of
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generation or entry).
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8. Check protection circuits on the signals. Verify in detail where
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9. Check protection circuits on the signals. Verify in detail where
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current flows through.
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9. Check if signal levels are compatible between outputs and inputs
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10. Check if signal levels are compatible between outputs and inputs
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(LVTTL etc.).
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10. Check for any crosses on wires (showing no connection) and check
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11. Check for any crosses on wires (showing no connection) and check
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connectivity of crossing wires (a dot should show connected).
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11. Check if there is a note about hard-wired settings of ICs
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12. Check if there is a note about hard-wired settings of ICs
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(division/amplification factors, operating modes etc.).
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12. Check if components are aligned to make the schematics look clear.
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13. Check consistency of naming and numbering of schematic pages.
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13. Check if components are aligned to make the schematics look clear.
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14. Check consistency of naming and numbering of schematic pages.
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### FMC mezzanine cards
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... | ... | |