... | @@ -54,7 +54,7 @@ |
... | @@ -54,7 +54,7 @@ |
|
14. Check if components are aligned to make the schematics look clear.
|
|
14. Check if components are aligned to make the schematics look clear.
|
|
15. Check consistency of naming and numbering of schematic pages.
|
|
15. Check consistency of naming and numbering of schematic pages.
|
|
16. Check for testability: can all signals be tested on a production
|
|
16. Check for testability: can all signals be tested on a production
|
|
test system (e.g., without needing probes, calibration etc.)
|
|
test system (e.g., without needing probes, calibration etc.).
|
|
17. Check if version or revision of a PCB can be accessed via gateware.
|
|
17. Check if version or revision of a PCB can be accessed via gateware.
|
|
|
|
|
|
## FMC mezzanine cards
|
|
## FMC mezzanine cards
|
... | @@ -62,7 +62,7 @@ |
... | @@ -62,7 +62,7 @@ |
|
1. EEPROM: GA1 should connect to A0, GA0 should connect to A1
|
|
1. EEPROM: GA1 should connect to A0, GA0 should connect to A1
|
|
(Observation 5.22 [ANSI/VITA 57.1
|
|
(Observation 5.22 [ANSI/VITA 57.1
|
|
spec](http://cdsweb.cern.ch/record/1172409?ln=en) - CERN only).
|
|
spec](http://cdsweb.cern.ch/record/1172409?ln=en) - CERN only).
|
|
2. TDI and TDO are connected together if not used on the mezzanine
|
|
2. TDI and TDO are connected together if not used on the mezzanine.
|
|
3. Connect all mounting holes to ground (this is not in the
|
|
3. Connect all mounting holes to ground (this is not in the
|
|
specification, but is the best practice).
|
|
specification, but is the best practice).
|
|
4. Have a note on the schematic about allowed Vadj level (e.g. most
|
|
4. Have a note on the schematic about allowed Vadj level (e.g. most
|
... | | ... | |