... | @@ -66,6 +66,30 @@ The DI/OT System Board controls the whole DI/OT crate, communicating with up to |
... | @@ -66,6 +66,30 @@ The DI/OT System Board controls the whole DI/OT crate, communicating with up to |
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| Mounting holes for FPGA heatsink | | | |
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| Mounting holes for FPGA heatsink | | | |
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| USB UART | | 1 | | |
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| USB UART | | 1 | | |
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### Compact PCI Serial backplane connectors
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* 287 FPGA I/Os in total
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* 8 MGTs (1 MGT per slot)
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### LPC FMC slot with 4 MGTs
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* 68 user-defined I/Os (34 diff-pairs)
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* Voltage translators - Ultrascale has 48 HD I/Os (3.3V max) and 416 HP I/Os (1.8V max)
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* I2C SCL and SDA
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* Present signal
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* 1 LPC MGTs
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* 3 HPC MGTs (required for FRAS, EN-SMM)
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* Vadj configurable?: 1.8V, 2.5V, 3.3V for LPC pins
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### Mechanics
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* Board dimensions: 100mm x 220mm
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* [EDA-03828](https://edms.cern.ch/ui/#!master/navigator/item?P:100130629:100130630:subDocs) to be used as a reference and mechanical template
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* Mechanics of the board shall be compliant with section 3.5.1 of CPCI-S.0 specification.
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* Mechanics of the front panel shall be compliant with sections 3.5.5, 3.5.7 of CPCI-S.0 specification.
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* FMC connector in the front to host a communication mezzanine
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* SFP cage in the front for White Rabbit support
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* CPCIs backplane connectors P1 - P6 in the back
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* ESD strips on both sides of the board, along the bottom edge of the PCB with discharge resistors according to section 3.5.10 of CPCI-S.0 specification.
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* The length of ESD strip segment 2 shall be 115mm.
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## Related links and documents
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## Related links and documents
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## Contacts
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## Contacts
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