TTL to/from RS485 converter
This board belongs to the level conversion circuits. It has the task of converting to/from TTL and TTLbar levels to RS485. Its core will be greatly shared with conv-ttl-blo and the main difference is related with the input/outputs present in the Rear Transition Module, which will be RS485.
/project/conv-ttl-rs485/repository/revisions/master/raw/doc/OHWR/Pictures/Board/conv-ttl-rs485_front_small.jpg:/project/conv-ttl-rs485/repository/revisions/master/raw/doc/OHWR/Pictures/Board/conv-ttl-rs485_front.jpg /project/conv-ttl-rs485/repository/revisions/master/raw/doc/OHWR/Pictures/Board/conv-ttl-rs485_top_small.jpg:/project/conv-ttl-rs485/repository/revisions/master/raw/doc/OHWR/Pictures/Board/conv-ttl-rs485_top.jpg
Features
The features should be discussed in a Review of Architecture. However, the following proposals gear towards offering the same functionality as it is done in conv-ttl-blo:
- VME64x double-height form factor using Front and Rear Transition Module
- Front panel has TTL and TTLbar inputs.
- Rear panel has 6 RS-485 channels. Each channel has one input and three outputs.
- Additional custom I/Os in front panel.
- Switch in front panel board for selecting multicast group.
- Front panel connector are double LEMO 00. Rear connector are hermafrodite LEMO EZG.0S.302.NLNY.
- Robust noise rejection in the link. Galvanic isolation for outputs.
- Rear panel: input protection against high-current and high-voltage transients.
- Communication through I2C allows to fetch logs of the repetitor board and change the pulse width.
- Time-tagging: White-Rabbit capable
- FPGA firmware can be remotely upgradeable.
- LEDs in panels:
- One LED for every channel. Front and rear panels.
- Three bicolour LEDs for White Rabbit status. Front panel.
- Power and general error bicolour LEDs. Front panel.
- Four bicolour LEDs for multicast group.
- Fail-safe operation: when differential voltage is below 200mV it should be notified to the FPGA. This will be a flag for open circuit lines.
- Line should be terminated. Cable is 110 Ohm differential impedance.
- Design targeted for links of 300 meters and having upto at least 32 nodes.
Documents
- CERN BE-CO-HT Wikis:
- Comparison of RS-485 transceivers.
Issues
- As it is pointed out in EDMS and shown up in level conversion circuits wiki, the outputs should be fail-safe aware.
- (red) Lead time of the straight LEMO EZG.0S.302.NLNY connector can be long. Need to provide a long-term use estimation.
Project status
Date | Event |
09-12-2011 | Kicking off the project. Samples of RS-485 transceivers requested from different vendors. |
20-01-2012 | Functional Specifications agreed. |
27-01-2012 | First prototype added to repo. Tests will be done next week. |
30-01-2012 | RTM Piggyback for RS-485 up in repo |
06-03-2012 | DEM layout is done with RS-485 piggyback, upon some modification discussed the last week. |
07-03-2012 | Prototype detects cable is not plugged. |
14-03-2012 | CONV-TTL-RS485 schematics up in repo. Front Panel connectors should be discussed. |
04-04-2012 | Revision of the Front Panel held. Will be the same as CONV-TTL-BLO. Schematics ready. |
29-04-2012 | Schematics revision 0 ready to review. They can be found in the repo |
10-05-2012 | Schematics revision 1. Review notes of schematics revision 0 available in repo |
16-05-2012 | Outputs are 5V legacy capable now. All logic is adapted to be 5V compliant. Revision 1 ready for review. |
30-05-2012 | Add selectable switch and LEDs for multicast group. |
18-07-2012 | Received a final proposal of layout from DEM (Bruno Recordon). Pending approval upon peer review. The front LEDs should be replaced by Dialight 568 ones. |
19-07-2012 | Added layout review by CGS. Download from here. |
20-07-2012 | All the components for the prototype have been gathered by Benjamin Ninet. |
02-08-2012 | Still waiting for symbols to be added to the library to finish the layout. |
17-08-2012 | Design is finished by DEM. Front panels added to the project: EDA-02541 . Pending upon section approval for manufacturing of the prototypes. |
29-08-2012 | Design modified and accepted. Moving into prototype assembly. |
24-10-2012 | Three prototypes received. Project on hold (lower priority than conv-ttl-blo |
Carlos Gil Soriano, Erik Van Der Bij - 24 October 2012