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Conv TTL Blocking
Commit c379545f authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana
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gw-submod: Update gateware to v2.0 with user guide update 

Signed-off-by: Theodor-Adrian Stana's avatarTheodor Stana <t.stana@cern.ch>
parent 3ced8fbf
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conv-ttl-blo-gw @ b7a79518
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doc/userguide/fig/conv-sys-bd.svg
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doc/userguide/userguide-conv-ttl-blo.tex
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......@@ -65,7 +65,7 @@
05-08-2013 & 1.04 & Memory map is now appendix \\
23-12-2013 & 1.05 & Added remote reprogramming support \\
10-01-2014 & 1.06 & Added SNMP access sub-section \\
14-02-2014 & 2.00 & Added diagnostics section \\
06-03-2014 & 2.00 & Added support for diagnostics \\
\hline
\end{tabular}
}
......@@ -136,6 +136,7 @@ pulses (see Section~\ref{sec:pulse-def}). The main features of the board are:
\item input pulse counters
\item input pulse time-tagging
\item manual pulse triggering
\item remotely reset the FPGA logic
\end{itemize}
\item Remote reprogramming over I$^2$C lines on VME P1 connector
\item Status LEDs
......@@ -562,9 +563,9 @@ a pulse will be generated on the output.}}
\subsection{Pulse jitter and delay}
\label{sec:pulse-jit}
Figure~\ref{fig:tpd-jit} defines propagation delay from input to output and output
jitter and shows how propagation delay was measured per each signal type.
Table~\ref{tbl:pulse-tpd-jit} presents the characteristics measured on
Figure~\ref{fig:tpd-jit} defines propagation delay from input to output (measured visually
using an oscilloscope with cursors placed on the signals as shown in the figure) and output
jitter. Table~\ref{tbl:pulse-tpd-jit} presents the characteristics measured on
the CONV-TTL-BLO.
The PG block incorporates a glitch filter that can prevent pulses being generated as a
......@@ -623,7 +624,7 @@ can be left in the \textbf{OFF} position.
$t_j$ & Leading edge jitter & & \\
& \hspace{2mm} Without glitch filter & 0 & ns \\
& \hspace{2mm} With glitch filter & 50 & ns \\
$t_{PD}$ & Propagation delay (1) & & \\
$t_{PD}$ & Propagation delay (1) (2) & & \\
& \hspace{2mm} TTL to TTL & 40 & ns \\
& \hspace{2mm} TTL to blocking & 80 & ns \\
& \hspace{2mm} Blocking to TTL & 80 & ns \\
......@@ -637,7 +638,8 @@ can be left in the \textbf{OFF} position.
}
\end{table}
\noindent Note 1: If the glitch filter is enabled, it adds an extra 350~ns delay to $t_{PD}$.
\noindent Note 1: If the glitch filter is enabled, it adds an extra 350~ns delay to $t_{PD}$. \\
\noindent Note 2: Measured visually using cursors on an oscilloscope.
%======================================================================================
% SEC: Communicating to the CONV-TTL-BLO
......@@ -692,12 +694,12 @@ data to the board. As names suggest, \textit{readreg} reads a board register, w
\multicolumn{1}{c}{\textbf{Command}} & \multicolumn{1}{c}{\textbf{Description}} \\
\hline
writereg \textit{slot addr val} & Writes the \textit{hex} value \textit{val} to hex address
\textit{addr} of board in slot number \textit{slot} \\
\textit{addr} of board in slot number \textit{slot}. \\
writemregs \textit{slot addr v1 .. v8} & Allows writing up to eight different values
to the same register. The values are given in hexadecimal
format and are separate by spaces \\
format and are separated by spaces. \\
readreg \textit{slot addr} & Returns the value of register at hex address \textit{addr} of
board in slot number \textit{slot} \\
board in slot number \textit{slot}. \\
\hline
\end{tabular}
}
......@@ -705,7 +707,7 @@ data to the board. As names suggest, \textit{readreg} reads a board register, w
An example of retrieving the CONV-TTL-BLO ID of a CONV-TTL-BLO plugged into VME slot 2 of the crate
\textit{some-crate} is given below. The converter board ID can be retrieved from the board ID
register at address 0x000 (BIDR -- see Appendix~\ref{app:conv-regs-bidr}),
register at address \textbf{0x000} (BIDR -- see Appendix~\ref{app:conv-regs-bidr}),
if the board is present in slot 2, the command should yield the ASCII string \textbf{TBLO}.
\begin{verbatim}
......@@ -742,7 +744,7 @@ An example of writing the value \textbf{0xabcde} to a register at address \textb
a board in VME slot 11 and then reading it back to check for correct write is given below.
Note that this example does not normally yield a similar result if performed on the
CONV-TTL-BLO, since even if a register is implemented at address \textbf{0x1c4},
it may be that not all of its bits are writable.
it may not be writable.
\begin{verbatim}
Connected to some-crate.cern.ch.
......@@ -785,8 +787,8 @@ iso.3.6.1.4.1.37968.1.1.8.2.2.1.2.1 = STRING: "54424C4F"
\end{verbatim}
Here, the \textit{snmpget} command is used with a version 2c SNMP protocol (the
\textit{-v} parameter) and using the public community string (the -c parameter).
The OID (the last parameter of the \textit{snmpget command}) contains multiple
\textit{-v} parameter) and using the public community string (the \textit{-c} parameter).
The OID (the last parameter of the \textit{snmpget} command) contains multiple
values that inform the MIB compiler how to parse the MIB object tree. Of these
values, only two are relevant to the user. These values are presented in
Figure~\ref{fig:oid}.
......@@ -811,8 +813,7 @@ An example of writing the value \textbf{0xabcde} to a register
at address \textbf{0x1c4} of a board in VME slot 11 and then reading it back to
check for correct write is given below. Note that this example does not normally
yield a similar result if performed on the CONV-TTL-BLO, since even if a register
is implemented at address \textbf{0x1c4}, it may be that not all of its bits are
writable.
is implemented at address \textbf{0x1c4}, it may not be writable.
\begin{verbatim}
%> snmpset -v2c -c admin-password some-crate \
......@@ -1032,12 +1033,12 @@ value.
& \multicolumn{1}{c}{\textbf{Description}} \\
\hline
WR & 8~ns & \textbf{\textit{Currently not implemented}} \newline
Precise, centralized and synchronized time-tag \newline
Precise, centralized and synchronized time-tag \newline
Obtained and configurable via WR \newline
Resolution: \textbf{8~ns} \\
Local & 8~ns & Local, unsynchronized time-tag \newline
Obtained by counting the ticks of a 125~MHz clock signal \newline
Can be set remotely by writing the TAI value registers (TVL/HR) \newline
Configurable by writing the TAI value registers (TVL/HR) \newline
Resolution: \textbf{8~ns} \\
\hline
\end{tabular}
......@@ -1075,11 +1076,19 @@ advance. A full read cycle of a FIFO sample should look like this:
The E (empty) or F (full) bits of the TFCSR can be used to know when to stop reading
the FIFO. Of the two, it is recommended to use the E bit and read the FIFO while
this bit is cleared ('0').
this bit is cleared ('0'). When the FIFO is full of samples, the FPGA will not store
any more samples and the F bit will be set. Note that the USED field will indicate 0
samples stored at this time.
When the FIFO is full of samples, the FPGA will not store any more samples
and the F bit will be set. Note that the USED field will indicate 0 samples stored
at this time.
\begin{figure}[h]
\centerline{\includegraphics[width=.7\textwidth]{fig/timetag-delay}}
\caption{Time-tag storage delay}
\label{fig:timetag-delay}
\end{figure}
Due to the internal logic of the FPGA, there is a delay of three to four 8~ns cycles
between the moment when a pulse arrives on the channel input and the moment when
a time-tag is stored to the FIFO. This delay is shown in Figure~\ref{fig:timetag-delay}.
%------------------------------------------------------------------------------
% SUBSEC: Remote reset
......@@ -1131,24 +1140,23 @@ here for formatting reasons and to keep to the rules of the Linux command-line.
It is possible to remotely trigger a pulse on a channel of choice. This feature
should only be used when debugging the connection between two CONV-TTL-BLO boards,
or between a CONV-TTL-BLO and another receiver. This is why manual pulse
triggering is "password" protected.
triggering is password-protected.
In order to manually trigger a pulse, a user should write a four-byte "magic sequence"
(the "password") to the MPT (manual pulse trigger) field in the board's control
register at address 0x004 (CR -- see Appendix~\ref{app:conv-regs-cr}). The MPT
field is dual-purpose, as shown in Figure~\ref{fig:cr-mpt}. As shown in
Table~\ref{tbl:man-trig-magic}, prior to sending a pulse, the MPT field should be written
with the magic sequence, followed by a channel number in the range \textbf{1..6}.
In order to manually trigger a pulse, the user should write five bytes to the board's control
register at address \textbf{0x004} (CR -- see Appendix~\ref{app:conv-regs-cr}), as shown in
Figure~\ref{tbl:man-trig}. The MPT field is dual-purpose, as shown in
Figure~\ref{fig:cr-mpt}. Until the magic sequence is input, it should be written with the
bytes in the magic sequence. After that, it should be written with the channel number.
\begin{figure}[h]
\centerline{\includegraphics[width=\textwidth]{fig/cr-mpt}}
\centerline{\includegraphics[width=.85\textwidth]{fig/cr-mpt}}
\caption{MPT field in the CR}
\label{fig:cr-mpt}
\end{figure}
\begin{table}[h]
\caption{Write sequence to initiate manual pulse triggering}
\label{tbl:man-trig-magic}
\label{tbl:man-trig}
\centerline
{
%\rowcolors{2}{white}{gray!25}
......@@ -1156,26 +1164,22 @@ with the magic sequence, followed by a channel number in the range \textbf{1..6}
\hline
\textbf{Byte 0} & \textbf{Byte 1} & \textbf{Byte 2} & \textbf{Byte 3} & \textbf{Byte 4}\\
\hline
0xde & 0xad & 0xbe & 0xef & Channel number in range \textbf{1..6} \\
0xde & 0xad & 0xbe & 0xef & Channel number in range 1..6 \\
\hline
\end{tabular}
}
\end{table}
Note that in order for a pulse to be triggered, five write cycles to the MPT must be
done. If the fifth cycle is a channel number in the range \textbf{1..6}, one and only
one pulse is generated on the channel outputs (both TTL and blocking). After that,
should it be desired to generate another pulse on the channel, the magic sequence
must be input again. If the channel number is not in the range \textbf{1..6}, no
pulse is generated on any channel and no error is reported.
Figure~\ref{fig:man-trig-fsm} shows the logic of the manual pulse triggering
mechanism. As can be seen from the figure, if one of the bytes of the magic
sequence is not as expected, the logic returns to waiting for the first byte
of the magic sequence.
Figure~\ref{fig:man-trig-fsm} shows the manual pulse triggering logic. In order for a
pulse to be triggered, five write cycles to the MPT field must be done. If the fifth cycle is
a channel number in the range 1..6, one and only one pulse is generated by the PG
block (see Figure~\ref{fig:pulse-rep}). After that, should it be desired to generate
another pulse on the channel, the magic sequence must be input again. If the channel
number is not in the range 1..6, no pulse is generated on any channel and no
error is reported.
\begin{figure}[h]
\centerline{\includegraphics[width=.6\textwidth]{fig/man-trig-fsm}}
\centerline{\includegraphics[width=.45\textwidth]{fig/man-trig-fsm}}
\caption{Manual pulse triggering logic}
\label{fig:man-trig-fsm}
\end{figure}
......@@ -1328,21 +1332,6 @@ data. The user can access this space via the FAR register. Note that in order to
data to the flash, a special sequence of commands should be sent. The flash write sequence
is given in the datasheet of the flash chip~\cite{m25p32}.
%--------------------------------------------------------------------------------------
% SUBSEC: Example script
%--------------------------------------------------------------------------------------
\subsection{The \textit{multiboot.py} script}
\label{sec:reprog-example-script}
An example Python script is provided to access the MultiBoot logic on the CONV-TTL-BLO.
The script can be found under the \textit{software/multiboot/} folder in the project
repository~\cite{ctb-repo}. The script implements the workflow in
Table~\ref{tbl:reprog-workflow} and can be used either as \textit{the} means of remotely
reprogramming the flash chip, or as an example for users to write their own tools.
Table~\ref{tbl:reprog-scripts} shows the files in the \textit{software/} repository folder
needed to run the script.
\begin{table}[h]
\caption{Scripts needed for remote reprogramming}
\label{tbl:reprog-scripts}
......@@ -1363,6 +1352,21 @@ needed to run the script.
}
\end{table}
%--------------------------------------------------------------------------------------
% SUBSEC: Example script
%--------------------------------------------------------------------------------------
\subsection{The \textit{multiboot.py} script}
\label{sec:reprog-example-script}
An example Python script is provided to access the MultiBoot logic on the CONV-TTL-BLO.
The script can be found under the \textit{software/multiboot/} folder in the project
repository~\cite{ctb-repo}. The script implements the workflow in
Table~\ref{tbl:reprog-workflow} and can be used either as \textit{the} means of remotely
reprogramming the flash chip, or as an example for users to write their own tools.
Table~\ref{tbl:reprog-scripts} shows the files in the \textit{software/} repository folder
needed to run the script.
The \textit{multiboot.py} script communicates to the reprogramming logic on the FPGA,
giving the user access to the following:
......
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