... | @@ -72,6 +72,8 @@ pins in the VME64x J1 connector. |
... | @@ -72,6 +72,8 @@ pins in the VME64x J1 connector. |
|
- [Second Review of architecture](Review201011)
|
|
- [Second Review of architecture](Review201011)
|
|
- [HDL blocks status](HDLStatus)
|
|
- [HDL blocks status](HDLStatus)
|
|
- Interesting Application Notes:
|
|
- Interesting Application Notes:
|
|
|
|
- Chapter 7 in [Spartan-6 FPGA Configuration, User
|
|
|
|
Guide](http://www.xilinx.com/support/documentation/user_guides/ug380.pdf)
|
|
- [Xilinx
|
|
- [Xilinx
|
|
Multiboot](http://www.xilinx.com/support/documentation/boards_and_kits/xtp059.pdf)
|
|
Multiboot](http://www.xilinx.com/support/documentation/boards_and_kits/xtp059.pdf)
|
|
- Chapter 17 in [Commands Line Tools User
|
|
- Chapter 17 in [Commands Line Tools User
|
... | | ... | |