CONV-TTL-BLO gateware version 2.1
Release notes
- Pulse repetition with max. duty cycle of 1/200; input pulses with duty cycle >1/200 are rejected
- I2C to Wishbone bridge following the protocol defined together with ELMA
- Diagnostics support
- converter board ID
- unique board ID via DS18B20 thermometer chip
- gateware version
- state of on-board switches
- state of RTM detection lines
- state of I2C watchdog timer
- input pulse counters
- time-tagging of last 128 received pulses, stored in rolling ring buffer
- remote logic reset
- manual pulse triggering
- system errors (also light ERR LED)
- Pulse and status LED control
- Remote reprogramming
Binary files
- Binary files for remote reprogramming
- To create a complete bitstream (golden + pulsetest) for direct download to the flash, see here
Sources
Documentation
* The block diagram of the logic is shown below.
* For information on the implementation of each block, consult the HDL guide:
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Clone the repository with the appropriate tag
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Then run the following commands in the project folder (
conv-ttl-blo-gw/
):cd doc/hdlguide/ make
Theodor-Adrian Stana, Apr. 2014