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# CONV-TTL-BLO gateware version 2.0
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## Release notes
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- Pulse repetition with max. duty cycle of 1/5; input pulses with duty
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cycle \>1/5 are rejected
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- I2C to Wishbone bridge following the protocol defined together with
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ELMA
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- Diagnostics support
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- converter board ID
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- unique board ID via DS18B20 thermometer chip
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- remote logic reset
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- gateware version
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- state of on-board switches
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- state of [RTM detection
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lines](https://www.ohwr.org/project/conv-ttl-blo/wikis/RTM-board-detection)
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- state of I2C watchdog timer
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- input pulse counters
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- time-tagging of last 128 received pulses
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- Pulse and status LED control
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- [Remote reprogramming](/Xil-multiboot)
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## Binary files
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- "conv\_ttl\_blo\_v2.0.bin":
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- "conv\_ttl\_blo\_v2.0.bit":
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## Sources
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- [tag v2.0 in
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repository](https://www.ohwr.org/project/conv-ttl-blo-gw/tree/v2.0/)
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## Documentation
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- The block diagram of the logic is shown below.
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\* For information on the implementation of each block, consult the HDL
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guide:
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* Clone the repository with the appropriate tag
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* Then run the following commands in the project folder
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(`conv-ttl-blo-gw/`):
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cd doc/hdlguide/
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make
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-----
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Theodor-Adrian Stana, Jan. 2014
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