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# Gateware user guide
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# Gateware user guide
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-----
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## General notes on remote reprogramming
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## General notes on remote reprogramming
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- [MultiBoot basics](/Xil-multiboot#multiboot-basics)
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- [MultiBoot basics](/Xil-multiboot#multiboot-basics)
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-----
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## Types of gateware
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## Types of gateware
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There are three types of gateware:
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There are three types of gateware:
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... | @@ -20,6 +24,8 @@ feature implemented on Xilinx Spartan-6 FPGAs. This means that there are |
... | @@ -20,6 +24,8 @@ feature implemented on Xilinx Spartan-6 FPGAs. This means that there are |
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two bitstreams on the CONV-TTL-BLO flash chips, a golden version and
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two bitstreams on the CONV-TTL-BLO flash chips, a golden version and
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(normally) a latest release version.
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(normally) a latest release version.
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-----
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## Gateware version
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## Gateware version
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The gateware version number can be read from the GWVERS field of the
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The gateware version number can be read from the GWVERS field of the
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... | @@ -46,6 +52,8 @@ number. To identify a board programmed with this gateware, read the |
... | @@ -46,6 +52,8 @@ number. To identify a board programmed with this gateware, read the |
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other fields of the SR. If they are all zeroes, the programmed gateware
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other fields of the SR. If they are all zeroes, the programmed gateware
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is a register test gateware.
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is a register test gateware.
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-----
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## Flash bitstreams memory map
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## Flash bitstreams memory map
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<table>
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<table>
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... | @@ -72,11 +80,15 @@ is a register test gateware. |
... | @@ -72,11 +80,15 @@ is a register test gateware. |
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See also the [CONV-TTL-BLO User
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See also the [CONV-TTL-BLO User
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Guide](https://www.ohwr.org/project/conv-ttl-blo/wikis/Documents/CONV-TTL-BLO-User-Guide).
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Guide](https://www.ohwr.org/project/conv-ttl-blo/wikis/Documents/CONV-TTL-BLO-User-Guide).
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-----
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## Generating bitstreams for MultiBoot design
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## Generating bitstreams for MultiBoot design
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- [Generating bitstreams for Xilinx FPGA
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- [Generating bitstreams for Xilinx FPGA
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reprogramming](/Xil-multiboot#generating-bitstreams-for-xilinx-fpga-reprogramming)
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reprogramming](/Xil-multiboot#generating-bitstreams-for-xilinx-fpga-reprogramming)
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-----
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## Preparing a bitstream containing the golden bitstream for MultiBoot
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## Preparing a bitstream containing the golden bitstream for MultiBoot
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To prepare a bitstream containing both the golden and the release
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To prepare a bitstream containing both the golden and the release
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... | @@ -85,6 +97,8 @@ use the **catbstream.py** script, which can be found under the |
... | @@ -85,6 +97,8 @@ use the **catbstream.py** script, which can be found under the |
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*software/** folder of the [main
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*software/** folder of the [main
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repository](https://www.ohwr.org/project/conv-ttl-blo/tree/master).
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repository](https://www.ohwr.org/project/conv-ttl-blo/tree/master).
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-----
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## Downloading the bitstream to the flash
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## Downloading the bitstream to the flash
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### Single board MultiBoot
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### Single board MultiBoot
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... | @@ -172,3 +186,7 @@ or see the README file in the same directory: |
... | @@ -172,3 +186,7 @@ or see the README file in the same directory: |
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cd /acc/local/share/scripts
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cd /acc/local/share/scripts
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more README
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more README
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-----
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Theodor-Adrian Stana, Jan. 2015
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