... | @@ -5,7 +5,7 @@ |
... | @@ -5,7 +5,7 @@ |
|
- **CHANGES IN MEMORY MAP FROM PREVIOUS VERSIONS**
|
|
- **CHANGES IN MEMORY MAP FROM PREVIOUS VERSIONS**
|
|
- the Multiboot module is now at address **0x100**
|
|
- the Multiboot module is now at address **0x100**
|
|
- see the [HDL
|
|
- see the [HDL
|
|
guide](https://www.ohwr.org/project/conv-ttl-blo-gw/uploads/f3aaf1514ad6a777a56e31c3e4a71cb1/hdlg-conv-ttl-blo-v0.2.pdf)
|
|
guide](https://ohwr.org/project/conv-ttl-blo-gw/uploads/f3aaf1514ad6a777a56e31c3e4a71cb1/hdlg-conv-ttl-blo-v0.2.pdf)
|
|
for details
|
|
for details
|
|
- Uses the [converter board common
|
|
- Uses the [converter board common
|
|
gateware](https://www.ohwr.org/project/conv-common-gw)
|
|
gateware](https://www.ohwr.org/project/conv-common-gw)
|
... | @@ -37,8 +37,8 @@ |
... | @@ -37,8 +37,8 @@ |
|
|
|
|
|
- Binary files for remote
|
|
- Binary files for remote
|
|
reprogramming
|
|
reprogramming
|
|
- [golden-v0.2.bin](https://www.ohwr.org/project/conv-ttl-blo-gw/uploads/61101d7fab4f12663b968defd95d04a2/golden-v0.2.bin)
|
|
- [golden-v0.2.bin](https://ohwr.org/project/conv-ttl-blo-gw/uploads/61101d7fab4f12663b968defd95d04a2/golden-v0.2.bin)
|
|
- [golden-v0.2.bit](https://www.ohwr.org/project/conv-ttl-blo-gw/uploads/df49998036f9dbb6f91d3bb2f84d85a9/golden-v0.2.bit)
|
|
- [golden-v0.2.bit](https://ohwr.org/project/conv-ttl-blo-gw/uploads/df49998036f9dbb6f91d3bb2f84d85a9/golden-v0.2.bit)
|
|
- To create a complete bitstream (golden + release) for direct
|
|
- To create a complete bitstream (golden + release) for direct
|
|
download to the flash, see
|
|
download to the flash, see
|
|
[here](/Releases#preparing-a-bitstream-containing-the-golden-bitstream-for-multiboot)
|
|
[here](/Releases#preparing-a-bitstream-containing-the-golden-bitstream-for-multiboot)
|
... | @@ -60,12 +60,12 @@ |
... | @@ -60,12 +60,12 @@ |
|
- Block
|
|
- Block
|
|
diagram
|
|
diagram
|
|
|
|
|
|
[![](/uploads/e74ea69342b039e746e82f782edbd848/hdl-bd-v0.2.svg)](/uploads/e74ea69342b039e746e82f782edbd848/hdl-bd-v0.2.svg)
|
|
[![](https://ohwr.org/project/conv-ttl-blo-gw/uploads/e74ea69342b039e746e82f782edbd848/hdl-bd-v0.2.svg)](https://ohwr.org/project/conv-ttl-blo-gw/uploads/e74ea69342b039e746e82f782edbd848/hdl-bd-v0.2.svg)
|
|
|
|
|
|
\* For the implementation of each block, consult the HDL guide
|
|
\* For the implementation of each block, consult the HDL guide
|
|
|
|
|
|
* [PDF
|
|
* [PDF
|
|
version](https://www.ohwr.org/project/conv-ttl-blo-gw/uploads/f3aaf1514ad6a777a56e31c3e4a71cb1/hdlg-conv-ttl-blo-v0.2.pdf)
|
|
version](https://ohwr.org/project/conv-ttl-blo-gw/uploads/f3aaf1514ad6a777a56e31c3e4a71cb1/hdlg-conv-ttl-blo-v0.2.pdf)
|
|
|
|
|
|
* compile from
|
|
* compile from
|
|
source
|
|
source
|
... | | ... | |