PCB design review of CONV-TTL-RS485-RTM-OPT
Held on 2nd of February 2018 at CERN, for version 1 of the PCB layout.
Designer:
- Benoit Civel (TE/MPE/EM)
Reviewers:
- Dimitris Lampridis (BE/CO/HT)
- Denia Bouhired-Ferrag (BE/CO/HT)
- Erik Van Der Bij (BE/CO/HT)
- Tomasz Wlostowski (BE/CO/HT)
Also present:
- Evangelia Gousiou (BE/CO/HT)
- Benjamin Ninet (BE/CO/IN)
Comments and feedback status
- Comments going back to the schematic
- Add one extra test point for P5VME.
- Assigned to: Benoit Civel
- Status: TODO
- Think again about reference designators (R1, C2, etc.). Is it
possible to have short names that still reflect the hierarchy
(eg. R1A1 for resistor R1 in channel 1, TX 1)? If not, then make
sure that PDFs will include all pages of the schematic (all
channels, etc.) so that it will be possible for people to find
which components belong to each channel.
- Assigned to: Dimitris Lampridis
- Status: TODO
- What if plugged as an RTM to a CONV-TTL-BLO by mistake? Study if
we should we add some protection to our circuit.
- Assigned to: Denia Bouhired-Ferrag
- Status: TODO
- Add one extra test point for P5VME.
- PCB layout comments
- Add a "+" to the electrolytic capacitor, next to it, such that
the plus sign will be visible after mounting the component on
the board.
- Assigned to: Benoit Civel
- Status: TODO
- Via size is too small, it will increase the production cost
without any obvious reason. Make them at least as big as the
layer stitching vias.
- Assigned to: Benoit Civel
- Status: TODO
- Eliminate potential "acid traps" (eg. under IC19) between ground
vias and ground fill.
- Assigned to: Benoit Civel
- Status: TODO
- Inverted silkscreen labels for test points (OP+, OP-, GND, etc.)
use small fonts and have been known to cause trouble during
manufacturing. Use non-inverted text, surrounded by a framing
rectangle (without any fill). Bigger labels (such as Channel 1,
TX A, etc) are ok, no need to change them.
- Assigned to: Benoit Civel
- Status: TODO
- Verify the mechanical stability of the sugarcubles for both the
optical transmitters and receivers. Will they hold without a nut
on the panel?
- Assigned to: Dimitris Lampridis
- Status: TODO
- Verify that the power supply circuit is not in the way of the P0
mating connector on the VME backplane.
- Assigned to: Dimitris Lampridis
- Status: TODO
- Use "https://" for both URLs on the silkscreen.
- Assigned to: Benoit Civel
- Status: TODO
- Place big "IN, O1 and O2" silkscreen labels to the left of each
channel on the PCB, to match the labels on the panel.
- Assigned to: Benoit Civel
- Status: TODO
- Place little a,b,c,d and z labels on the P2 connector, such that
they remain visible after the connector is mounted.
- Assigned to: Benoit Civel
- Status: TODO
- Add a "+" to the electrolytic capacitor, next to it, such that
the plus sign will be visible after mounting the component on
the board.
- Front panel comments
- Figure out a way to fit "RTM" in the name printed on the panel.
- Assigned to: Dimitris Lampridis
- Status: TODO
- Figure out a way to fit "RTM" in the name printed on the panel.
- Other comments
- Change the name of the project and URL in OHWR. Also update the
board silkscreen with new URL (and name if necessary)
- Assigned to: Erik van der Bij (then Benoit Civel for updating the board once the new URL is in place).
- Status: TODO
- Change the name of the project and URL in OHWR. Also update the
board silkscreen with new URL (and name if necessary)
Dimitris Lampridis - February, 2018