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 # Description
 
 ## Project description:
-The goal of this project is to provide a radiation hardened FPGA-based replacement for the MicroFIP chip, a WorldFIP agent. This FPGA replacement is called *NanoFIP*.
+
+The goal of this project is to provide a radiation hardened FPGA-based
+replacement for the MicroFIP chip, a WorldFIP agent. This FPGA
+replacement is called *NanoFIP*.
 
 ## Detailed project information
+
 The project is organized in work packages. The work packages are:
 
   - WP1. Alstom MicroFIP preliminary VHDL code interpretation
@@ -21,141 +25,153 @@ Note that for the development of the FPGA replacement that either WP4
 *or* WP5 will be needed. The decision between the adaptation of existing
 VHDL code (WP4) or the development of completely new code (WP5) will be
 made based on the results of WP1, WP2 and WP3.It was concluded in March
-2009 that new code needed to be developed.
+2009 that new code needed to be
+developed.
 
 ## Detailed description of work packages
 
-\--<s>** \[\[WP1\]\[WP1. Alstom MicroFIP preliminary VHDL code
-interpretation\]\]</s> Done  
-\[\[WP1\]\[WP1 Twiki page\]\]  
-\* Verify code with Modelsim, Synplicity Synplify, Mentor Precision and
+### [WP1. Alstom MicroFIP preliminary VHDL code interpretation](WP1) - Done
+
+[WP1 wiki page](WP1)
+
+  - Verify code with Modelsim, Synplicity Synplify, Mentor Precision and
     Actel (without simulation)
-\* Deliverables  
-\* List of warnings given by the different tools  
-\* Global documentation of each entity  
-\* Estimation of risks associated with modifying the code  
-\* Give recommendation of choice between using the Alstom code with
-minor modifications or writing a new MicroFIP-like device from scratch
-(with possible re-use of certain Alstom modules)  
-\* Duration  
-\* Two manweeks
-
-\--<s>** \[\[WP2\]\[WP2. Write project management doc for insourcing of
-MicroFIP\]\]</s> Done  
-\[\[WP2\]\[WP2 Twiki page\]\]  
-\* Deliverable  
-\* Document describing  
-\* Reference documentation  
-\* Reasons for insourcing  
-\* Radiation tests  
-\* Risks of availability of components  
-\* Risks with other components (FielDrive, FieldTR)  
-\* Need for open hardware core  
-\* Work packages description  
-\* Duration  
-\* Two manweeks
-
-\--<s>** \[\[WP3\]\[WP3. Write functional specification of MicroFIP
-replacement\]\]</s> Done  
-\[\[WP3\]\[WP3 Twiki page\]\]  
-\* Collect detailed information on how the current MicroFIP is used in
+  - Deliverables
+      - List of warnings given by the different tools
+      - Global documentation of each entity
+      - Estimation of risks associated with modifying the code
+      - Give recommendation of choice between using the Alstom code with
+        minor modifications or writing a new MicroFIP-like device from
+        scratch (with possible re-use of certain Alstom modules)
+  - Duration
+      - Two
+manweeks
+
+### [WP2. Write project management doc for insourcing of MicroFIP](WP2) - Done
+
+[WP2 wiki page](WP2)
+
+  - Deliverable
+      - Document describing
+          - Reference documentation
+          - Reasons for insourcing
+          - Radiation tests
+          - Risks of availability of components
+          - Risks with other components (FielDrive, FieldTR)
+          - Need for open hardware core
+          - Work packages description
+  - Duration
+      - Two
+manweeks
+
+### [WP3. Write functional specification of MicroFIP replacement](WP3) - Done
+
+[WP3 wiki page](WP3)
+
+  - Collect detailed information on how the current MicroFIP is used in
     CERN’s applications and which operation modes are not used.
-\* Deliverable  
-\* Document  
-\* Describing the subset of modes that are used at CERN  
-\* Functional specification of the needed MicroFIP replacement  
-\* Keep compatibility to orginal MicroFIP so that existing
+  - Deliverable
+      - Document
+          - Describing the subset of modes that are used at CERN
+          - Functional specification of the needed MicroFIP replacement
+          - Keep compatibility to orginal MicroFIP so that existing
             documentation, experience and software can be used in CERN’s
             applications.
-\* Duration  
-\* Six manweeks
+  - Duration
+      - Six manweeks
+
+### WP4. Rewrite and extend Alstom MicroFIP VHDL code - Cancelled
 
-\--<s>** WP4. Rewrite and extend Alstom MicroFIP VHDL code</s>
-Cancelled  
 *WP4 cancelled: chosen to write completely new VHDL code (i.e. WP5)*
 
-\* Document Alstom MicroFIP VHDL code (33 files, 18000 lines of code)  
-\* Remove unused modes of MicroFIP  
-\* Optimise design to remove certain coding issues  
-\* Extend MicroFIP code for single event upset robustness  
-\* Triple redundancy  
-\* Scrubbing of memory  
-\* FielDrive incoming glitch detection and handling  
-\* Deliverables  
-\* Documented SEU robust VHDL code  
-\* Compatible to orginal MicroFIP so that existing documentation,
+  - Document Alstom MicroFIP VHDL code (33 files, 18000 lines of code)
+  - Remove unused modes of MicroFIP
+  - Optimise design to remove certain coding issues
+  - Extend MicroFIP code for single event upset robustness
+      - Triple redundancy
+      - Scrubbing of memory
+      - FielDrive incoming glitch detection and handling
+  - Deliverables
+      - Documented SEU robust VHDL code
+      - Compatible to orginal MicroFIP so that existing documentation,
         experience and software can be used in CERN’s applications
-\* Duration  
-\* Fourteen manweeks  
-\* **Note: either WP4 or WP5 needs to be done**
-
-\--<s>** \[\[WP5\]\[WP5. Write new NanoFIP VHDL code\]\]</s> In
-progress  
-\[\[WP5\]\[WP5 Twiki page\]\]  
-\* Write technical specifications - based on the functional
+  - Duration
+      - Fourteen manweeks
+  - **Note: either WP4 or WP5 needs to be done**
+
+### [WP5. Write new NanoFIP VHDL code](WP5) - In progress
+
+[WP5 wiki page](WP5)
+
+  - Write technical specifications - based on the functional
     specification written as part of WP3
-\* Write new compatible MicroFIP VHDL with zero use of Alstom code  
-\* Includes design for single event upset robustness  
-\* Triple redundancy  
-\* Scrubbing of memory  
-\* FielDrive incoming glitch detection and handling  
-\* Deliverables  
-\* Fully documented SEU robust VHDL code  
-\* Compatible to orginal MicroFIP so that existing documentation,
-experience and software can be used in CERN’s applications  
-\* Update: only partial compatibility required (see WP3)  
-\* Duration  
-\* Twenty-six manweeks  
-\* **Note: either WP4 or WP5 needs to be done**
-
-\--<s>** \[\[WP6\]\[WP6. VHDL Testbench creation and simulation of
-NanoFIP\]\]</s> In progress  
-\[\[WP6\]\[WP6 Twiki page\]\]  
-\* Write VHDL testbenches that allow to test the MicroFIP  
-\* FielDrive emulator (needed for MicroFIP stand-alone mode)  
-\* Processor bus emulator (needed for MicroFIP in microcontrolled
+  - Write new compatible MicroFIP VHDL with zero use of Alstom code
+  - Includes design for single event upset robustness
+      - Triple redundancy
+      - Scrubbing of memory
+      - FielDrive incoming glitch detection and handling
+  - Deliverables
+      - Fully documented SEU robust VHDL code 
+          - Compatible to orginal MicroFIP so that existing
+            documentation, experience and software can be used in CERN’s
+            applications
+          - Update: only partial compatibility required (see WP3)
+  - Duration
+      - Twenty-six manweeks
+  - **Note: either WP4 or WP5 needs to be
+done**
+
+### [WP6. VHDL Testbench creation and simulation of NanoFIP](WP6) - In progress
+
+[WP6 wiki page](WP6)
+
+  - Write VHDL testbenches that allow to test the MicroFIP
+      - FielDrive emulator (needed for MicroFIP stand-alone mode)
+      - Processor bus emulator (needed for MicroFIP in microcontrolled
         mode)
-\* *Verify if Alstom or HLP have not already developed test benches*  
-\* Deliverables  
-\* FielDrive emulator with file I/O and verification of data  
-\* Processor bus emulator with file I/O and verification of data  
-\* Complete set of PASS/FAIL test suites  
-\* Duration  
-\* Twelve manweeks
-
-\---** WP7. Stand-alone mode test board design and test  
-\* Design a daughter board for use on Actel evaluation board  
-\* Main components: FielDrive, FieldTR  
-\* Simple switch and LED I/O  
-\* Used to test stand-alone operation mode only  
-\* Set up hardware test bench with WorldFIP master  
-\* Set up test software  
-\* Deliverables  
-\* Working demonstrator for MicroFIP in stand-alone mode  
-\* Duration  
-\* Six manweeks
-
-\---** WP8. Design board for functional and radiation test  
-\* Design a PCB with an Actel-based NanoFIP with microcontroller for
+      - *Verify if Alstom or HLP have not already developed test
+        benches*
+  - Deliverables
+      - FielDrive emulator with file I/O and verification of data
+      - Processor bus emulator with file I/O and verification of data
+      - Complete set of PASS/FAIL test suites
+  - Duration
+      - Twelve manweeks
+
+### WP7. Stand-alone mode test board design and test
+
+  - Design a daughter board for use on Actel evaluation board
+      - Main components: FielDrive, FieldTR
+      - Simple switch and LED I/O
+  - Used to test stand-alone operation mode only
+  - Set up hardware test bench with WorldFIP master
+  - Set up test software
+  - Deliverables
+      - Working demonstrator for MicroFIP in stand-alone mode
+  - Duration
+      - Six manweeks
+
+### WP8. Design board for functional and radiation test
+
+  - Design a PCB with an Actel-based NanoFIP with microcontroller for
     stand-alone and microcontrolled mode
-\* Set up hardware test bench with WorldFIP master  
-\* Set up test software  
-\* Debug  
-\* Deliverables  
-\* Working board  
-\* Suite of automated tests  
-\* Duration  
-\* Eight manweeks
-
-\---** WP9. Radiation tests  
-\* Radiation resistance test of functional boards in stand-alone and
+  - Set up hardware test bench with WorldFIP master
+  - Set up test software
+  - Debug
+  - Deliverables
+      - Working board 
+      - Suite of automated tests
+  - Duration
+      - Eight manweeks
+
+### WP9. Radiation tests
+
+  - Radiation resistance test of functional boards in stand-alone and
     processor mode
-\* Deliverables  
-\* Report on radiation tests  
-\* Duration  
-\* Two manweeks
-
------
+  - Deliverables
+      - Report on radiation tests
+  - Duration
+      - Two manweeks
 
 \-- Main.ErikVanDerBij - 31 July 2009