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@@ -67,10 +67,10 @@ package along with its status is described in the following table:
 </table>
 
 \_\<\*\>For the development of the FPGA replacement either WP4 or WP5
-will be needed.  
-The decision between the **adaptation of existing VHDL code** (WP4) or  
-the **development of completely new code** (WP5) will be made based on
-the results of WP1, WP2 and WP3.\_
+will be needed. The decision between the **adaptation of existing VHDL
+code** (WP4)  
+or the **development of completely new code** (WP5) will be made based
+on the results of WP1, WP2 and WP3.\_
 
 *It was concluded in March 2009 that new code needed to be
 developed**.*