Commit 2cd3e8d2 authored by Lucas Russo's avatar Lucas Russo

Merge branch 'acq-core-trigger' into devel

parents 70cebe9a 228a663b
...@@ -184,6 +184,7 @@ include $(SRC_DIR)/dev_mngr/dev_mngr.mk ...@@ -184,6 +184,7 @@ include $(SRC_DIR)/dev_mngr/dev_mngr.mk
include $(SRC_DIR)/dev_io/dev_io.mk include $(SRC_DIR)/dev_io/dev_io.mk
include $(SRC_DIR)/msg/msg.mk include $(SRC_DIR)/msg/msg.mk
include $(SRC_DIR)/revision/revision.mk include $(SRC_DIR)/revision/revision.mk
include $(SRC_DIR)/boards/$(BOARD)/board.mk
# Project boards # Project boards
boards_INCLUDE_DIRS = -Iinclude/boards/$(BOARD) boards_INCLUDE_DIRS = -Iinclude/boards/$(BOARD)
...@@ -216,10 +217,10 @@ dev_mngr_OBJS += $(dev_mngr_core_OBJS) $(debug_OBJS) \ ...@@ -216,10 +217,10 @@ dev_mngr_OBJS += $(dev_mngr_core_OBJS) $(debug_OBJS) \
$(ll_io_utils_OBJS) $(dev_io_core_utils_OBJS) $(ll_io_utils_OBJS) $(dev_io_core_utils_OBJS)
dev_io_OBJS += $(dev_io_core_OBJS) $(ll_io_OBJS) \ dev_io_OBJS += $(dev_io_core_OBJS) $(ll_io_OBJS) \
$(sm_io_OBJS) $(msg_OBJS) $(sm_io_OBJS) $(msg_OBJS) $(board_OBJS)
dev_io_cfg_OBJS += $(dev_io_core_OBJS) $(ll_io_OBJS) \ dev_io_cfg_OBJS += $(dev_io_core_OBJS) $(ll_io_OBJS) \
$(sm_io_OBJS) $(msg_OBJS) $(sm_io_OBJS) $(msg_OBJS) $(board_OBJS)
# Specific libraries for OUT targets # Specific libraries for OUT targets
dev_mngr_LIBS = dev_mngr_LIBS =
......
...@@ -9,60 +9,140 @@ dev_mngr ...@@ -9,60 +9,140 @@ dev_mngr
filename = dev_mngr.log filename = dev_mngr.log
verbose = 1 # Ask for a trace verbose = 1 # Ask for a trace
daemonize = no # Ask for daemonize process (options are: yes or no) daemonize = no # Ask for daemonize process (options are: yes or no)
workdir = . # Working directory for daemon
spawn_broker = no # Ask to spawn broker (options are: yes or no)
# Device I/O configurations # Device I/O configurations
dev_io dev_io
board0 board0
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board1 board1
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board2 board2
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board3 board3
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board4 board4
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board5 board5
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
board6
bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
board7
bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
board8
bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
board9
bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
board10
bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
board11
bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe
afe
bind =
bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
...@@ -9,114 +9,140 @@ dev_mngr ...@@ -9,114 +9,140 @@ dev_mngr
filename = dev_mngr.log filename = dev_mngr.log
verbose = 1 # Ask for a trace verbose = 1 # Ask for a trace
daemonize = no # Ask for daemonize process (options are: yes or no) daemonize = no # Ask for daemonize process (options are: yes or no)
workdir = . # Working directory for daemon
spawn_broker = no # Ask to spawn broker (options are: yes or no)
# Device I/O configurations # Device I/O configurations
dev_io dev_io
board0 board0
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board1 board1
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board2 board2
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.210:6791 bind = tcp://10.2.117.210:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.211:6791 bind = tcp://10.2.117.211:6791
board3 board3
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.208:6791 bind = tcp://10.2.117.208:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.209:6791 bind = tcp://10.2.117.209:6791
board4 board4
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.206:6791 bind = tcp://10.2.117.206:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.207:6791 bind = tcp://10.2.117.207:6791
board5 board5
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board6 board6
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board7 board7
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.204:6791 bind = tcp://10.2.117.204:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.205:6791 bind = tcp://10.2.117.205:6791
board8 board8
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.202:6791 bind = tcp://10.2.117.202:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.203:6791 bind = tcp://10.2.117.203:6791
board9 board9
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.200:6791 bind = tcp://10.2.117.200:6791
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = tcp://10.2.117.201:6791 bind = tcp://10.2.117.201:6791
board10 board10
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
board11 board11
bpm0 bpm0
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
bpm1 bpm1
spawn_epics_ioc = yes # Ask to spawn EPICS IOC (Options are: yes or no)
dbe dbe
afe afe
bind = bind =
...@@ -203,11 +203,21 @@ int main (int argc, char *argv []) ...@@ -203,11 +203,21 @@ int main (int argc, char *argv [])
goto err_bpm_client_new; goto err_bpm_client_new;
} }
/* Set trigger to skip */
uint32_t acq_trig = 0;
bpm_client_err_e err = bpm_set_acq_trig (bpm_client, service, acq_trig);
if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:acq]: bpm_acq_set_trig failed\n");
goto err_bpm_set_acq_trig;
}
uint32_t data_size = num_samples*acq_chan[chan].sample_size; uint32_t data_size = num_samples*acq_chan[chan].sample_size;
uint32_t *data = (uint32_t *) zmalloc (data_size*sizeof (uint8_t)); uint32_t *data = (uint32_t *) zmalloc (data_size*sizeof (uint8_t));
bool new_acq = true; bool new_acq = true;
acq_trans_t acq_trans = {.req = { acq_trans_t acq_trans = {.req = {
.num_samples = num_samples, .num_samples_pre = num_samples,
.num_samples_post = 0,
.num_shots = 1,
.chan = chan, .chan = chan,
}, },
.block = { .block = {
...@@ -215,7 +225,7 @@ int main (int argc, char *argv []) ...@@ -215,7 +225,7 @@ int main (int argc, char *argv [])
.data_size = data_size, .data_size = data_size,
} }
}; };
bpm_client_err_e err = bpm_get_curve (bpm_client, service, &acq_trans, err = bpm_get_curve (bpm_client, service, &acq_trans,
50000, new_acq); 50000, new_acq);
if (err != BPM_CLIENT_SUCCESS){ if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:acq]: bpm_get_curve failed\n"); fprintf (stderr, "[client:acq]: bpm_get_curve failed\n");
...@@ -227,6 +237,7 @@ int main (int argc, char *argv []) ...@@ -227,6 +237,7 @@ int main (int argc, char *argv [])
print_data (chan, data, acq_trans.block.bytes_read); print_data (chan, data, acq_trans.block.bytes_read);
err_bpm_client_new: err_bpm_client_new:
err_bpm_set_acq_trig:
err_bpm_get_curve: err_bpm_get_curve:
str_p = &chan_str; str_p = &chan_str;
free (*str_p); free (*str_p);
......
/*
* * Simple example demonstrating the communication between
* * a client and the FPGA device
* */
#include <czmq.h>
#include <inttypes.h>
#include <stdio.h>
#include <string.h>
#include <bpm_client.h>
#define DFLT_BIND_FOLDER "/tmp/bpm"
#define DFLT_BPM_NUMBER 0
#define MAX_BPM_NUMBER 1
#define DFLT_BOARD_NUMBER 0
void print_help (char *program_name)
{
printf( "Usage: %s [options]\n"
"\t-h This help message\n"
"\t-v Verbose output\n"
"\t-b <broker_endpoint> Broker endpoint\n"
"\t-board <AMC board = [0|1|2|3|4|5]>\n"
"\t-bpm <BPM number = [0|1]>\n"
, program_name);
}
int main (int argc, char *argv [])
{
int verbose = 0;
char *broker_endp = NULL;
char *board_number_str = NULL;
char *bpm_number_str = NULL;
char **str_p = NULL;
if (argc < 2) {
print_help (argv[0]);
exit (1);
}
/* FIXME: This is rather buggy! */
/* Simple handling of command-line options. This should be done
* * with getopt, for instance*/
int i;
for (i = 1; i < argc; i++)
{
if (streq(argv[i], "-v")) {
verbose = 1;
}
else if (streq(argv[i], "-h"))
{
print_help (argv [0]);
exit (1);
}
else if (streq (argv[i], "-b")) {
str_p = &broker_endp;
}
else if (streq (argv[i], "-board")) { /* board_number: board number */
str_p = &board_number_str;
}
else if (streq(argv[i], "-bpm"))
{
str_p = &bpm_number_str;
}
/* Fallout for options with parameters */
else {
*str_p = strdup (argv[i]);
}
}
/* Set default broker address */
if (broker_endp == NULL) {
broker_endp = strdup ("ipc://"DFLT_BIND_FOLDER);
}
/* Set default board number */
uint32_t board_number;
if (board_number_str == NULL) {
fprintf (stderr, "[client:acq]: Setting default value to BOARD number: %u\n",
DFLT_BOARD_NUMBER);
board_number = DFLT_BOARD_NUMBER;
}
else {
board_number = strtoul (board_number_str, NULL, 10);
}
/* Set default bpm number */
uint32_t bpm_number;
if (bpm_number_str == NULL) {
fprintf (stderr, "[client:leds]: Setting default value to BPM number: %u\n",
DFLT_BPM_NUMBER);
bpm_number = DFLT_BPM_NUMBER;
}
else {
bpm_number = strtoul (bpm_number_str, NULL, 10);
if (bpm_number > MAX_BPM_NUMBER) {
fprintf (stderr, "[client:leds]: BPM number too big! Defaulting to: %u\n",
MAX_BPM_NUMBER);
bpm_number = MAX_BPM_NUMBER;
}
}
char service[50];
snprintf (service, sizeof (service), "BPM%u:DEVIO:ACQ%u", board_number, bpm_number);
bpm_client_t *bpm_client = bpm_client_new (broker_endp, verbose, NULL);
if (bpm_client == NULL) {
fprintf (stderr, "[client:acq]: bpm_client could be created\n");
goto err_bpm_client_new;
}
bpm_client_err_e err = BPM_CLIENT_SUCCESS;
/* Generate trigger */
uint32_t sw_trig = 1;
err = bpm_set_acq_sw_trig (bpm_client, service, sw_trig);
if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:acq]: bpm_acq_set_trig failed\n");
goto err_bpm_set_acq_sw_trig;
}
err_bpm_set_acq_sw_trig:
err_bpm_client_new:
str_p = &board_number_str;
free (*str_p);
board_number_str = NULL;
str_p = &bpm_number_str;
free (*str_p);
bpm_number_str = NULL;
str_p = &broker_endp;
free (*str_p);
broker_endp = NULL;
bpm_client_destroy (&bpm_client);
return 0;
}
...@@ -109,7 +109,7 @@ int main (int argc, char *argv []) ...@@ -109,7 +109,7 @@ int main (int argc, char *argv [])
} }
for (i = 0; i < 32768; ++i) { for (i = 0; i < 32768; ++i) {
uint32_t leds = (1 << 1); uint32_t leds = 1;
unsigned int j; unsigned int j;
for (j = 0; j < 3; ++j) { for (j = 0; j < 3; ++j) {
if (zctx_interrupted) { if (zctx_interrupted) {
......
...@@ -108,8 +108,16 @@ int main (int argc, char *argv []) ...@@ -108,8 +108,16 @@ int main (int argc, char *argv [])
goto err_bpm_client_new; goto err_bpm_client_new;
} }
uint32_t monit_updt = 1;
bpm_client_err_e err = bpm_set_monit_updt (bpm_client, service,
monit_updt);
if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:acq]: bpm_set_monit_updt failed\n");
goto err_set_monit_updt;
}
uint32_t monit_amp; uint32_t monit_amp;
bpm_client_err_e err = bpm_get_monit_amp_ch0 (bpm_client, service, err = bpm_get_monit_amp_ch0 (bpm_client, service,
&monit_amp); &monit_amp);
if (err != BPM_CLIENT_SUCCESS){ if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:acq]: bpm_get_monit_amp_ch0 failed\n"); fprintf (stderr, "[client:acq]: bpm_get_monit_amp_ch0 failed\n");
...@@ -144,6 +152,7 @@ int main (int argc, char *argv []) ...@@ -144,6 +152,7 @@ int main (int argc, char *argv [])
err_bpm_client_new: err_bpm_client_new:
err_get_monit_amp: err_get_monit_amp:
err_set_monit_updt:
bpm_client_destroy (&bpm_client); bpm_client_destroy (&bpm_client);
str_p = &board_number_str; str_p = &board_number_str;
free (*str_p); free (*str_p);
......
...@@ -108,8 +108,16 @@ int main (int argc, char *argv []) ...@@ -108,8 +108,16 @@ int main (int argc, char *argv [])
goto err_bpm_client_new; goto err_bpm_client_new;
} }
uint32_t monit_updt = 1;
bpm_client_err_e err = bpm_set_monit_updt (bpm_client, service,
monit_updt);
if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:acq]: bpm_set_monit_updt failed\n");
goto err_set_monit_updt;
}
uint32_t monit_pos; uint32_t monit_pos;
bpm_client_err_e err = bpm_get_monit_pos_x (bpm_client, service, err = bpm_get_monit_pos_x (bpm_client, service,
&monit_pos); &monit_pos);
if (err != BPM_CLIENT_SUCCESS){ if (err != BPM_CLIENT_SUCCESS){
fprintf (stderr, "[client:acq]: bpm_get_monit_pos_x failed\n"); fprintf (stderr, "[client:acq]: bpm_get_monit_pos_x failed\n");
...@@ -144,6 +152,7 @@ int main (int argc, char *argv []) ...@@ -144,6 +152,7 @@ int main (int argc, char *argv [])
err_bpm_client_new: err_bpm_client_new:
err_get_monit_pos: err_get_monit_pos:
err_set_monit_updt:
bpm_client_destroy (&bpm_client); bpm_client_destroy (&bpm_client);
str_p = &board_number_str; str_p = &board_number_str;
free (*str_p); free (*str_p);
......
Subproject commit 31ab2b5005995a3dcc5cc17651ae9849237a9e73 Subproject commit bd22bffa27e335f9a5a3fcf65ffaaba32f60d634
...@@ -4,6 +4,10 @@ ...@@ -4,6 +4,10 @@
#include "hw/pcie_regs.h" #include "hw/pcie_regs.h"
#include "acq_chan_afcv3.h" #include "acq_chan_afcv3.h"
#define NUM_MAX_SLOTS 12
#define NUM_MAX_BPM_PER_SLOT 2
#define NUM_MAX_BPMS (NUM_MAX_SLOTS * NUM_MAX_BPM_PER_SLOT)
#define NUM_FMC130M_4CH_SMIOS 2 #define NUM_FMC130M_4CH_SMIOS 2
/*********************** Static AFCv3 FPGA layout ***********************/ /*********************** Static AFCv3 FPGA layout ***********************/
...@@ -21,6 +25,9 @@ ...@@ -21,6 +25,9 @@
/* AFC DIAG Components */ /* AFC DIAG Components */
#define WB_AFC_DIAG_CTRL_RAW_REGS_OFFS 0x0000 #define WB_AFC_DIAG_CTRL_RAW_REGS_OFFS 0x0000
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_RAW_REGS_OFFS 0x0000
/* Should be autodiscovered by SDB */ /* Should be autodiscovered by SDB */
/* Wishbone RAW Addresses */ /* Wishbone RAW Addresses */
...@@ -110,6 +117,9 @@ ...@@ -110,6 +117,9 @@
#define DSP_CTRL_REGS_OFFS (BAR4_ADDR | DSP_CTRL_RAW_REGS_OFFS) #define DSP_CTRL_REGS_OFFS (BAR4_ADDR | DSP_CTRL_RAW_REGS_OFFS)
#define DSP_BPM_SWAP_OFFS (BAR4_ADDR | DSP_BPM_RAW_SWAP_OFFS) #define DSP_BPM_SWAP_OFFS (BAR4_ADDR | DSP_BPM_RAW_SWAP_OFFS)
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_REGS_OFFS (BAR4_ADDR | WB_ACQ_CORE_CTRL_RAW_REGS_OFFS)
/* Wishbone Addresses */ /* Wishbone Addresses */
#define FMC1_130M_BASE_ADDR (BAR4_ADDR | FMC1_130M_BASE_RAW_ADDR) #define FMC1_130M_BASE_ADDR (BAR4_ADDR | FMC1_130M_BASE_RAW_ADDR)
......
...@@ -4,6 +4,10 @@ ...@@ -4,6 +4,10 @@
#include "hw/pcie_regs.h" #include "hw/pcie_regs.h"
#include "acq_chan_ml605.h" #include "acq_chan_ml605.h"
#define NUM_MAX_SLOTS 1
#define NUM_MAX_BPM_PER_SLOT 2
#define NUM_MAX_BPMS (NUM_MAX_SLOTS * NUM_MAX_BPM_PER_SLOT)
#define NUM_FMC130M_4CH_SMIOS 1 #define NUM_FMC130M_4CH_SMIOS 1
/*********************** Static ML605 FPGA layout ***********************/ /*********************** Static ML605 FPGA layout ***********************/
...@@ -18,6 +22,9 @@ ...@@ -18,6 +22,9 @@
#define DSP_CTRL_RAW_REGS_OFFS 0x0000 #define DSP_CTRL_RAW_REGS_OFFS 0x0000
#define DSP_BPM_RAW_SWAP_OFFS 0x0100 #define DSP_BPM_RAW_SWAP_OFFS 0x0100
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_RAW_REGS_OFFS 0x0000
/* Should be autodiscovered by SDB */ /* Should be autodiscovered by SDB */
/* Wishbone RAW Addresses */ /* Wishbone RAW Addresses */
...@@ -78,6 +85,9 @@ ...@@ -78,6 +85,9 @@
#define DSP_CTRL_REGS_OFFS (/*BAR4_ADDR |*/ DSP_CTRL_RAW_REGS_OFFS) #define DSP_CTRL_REGS_OFFS (/*BAR4_ADDR |*/ DSP_CTRL_RAW_REGS_OFFS)
#define DSP_BPM_SWAP_OFFS (/*BAR4_ADDR |*/ DSP_BPM_RAW_SWAP_OFFS) #define DSP_BPM_SWAP_OFFS (/*BAR4_ADDR |*/ DSP_BPM_RAW_SWAP_OFFS)
/* ACQ Components */
#define WB_ACQ_CORE_CTRL_REGS_OFFS (/*BAR4_ADDR |*/ WB_ACQ_CORE_CTRL_RAW_REGS_OFFS)
/* Wishbone Addresses */ /* Wishbone Addresses */
#define FMC1_130M_BASE_ADDR (BAR4_ADDR | FMC1_130M_BASE_RAW_ADDR) #define FMC1_130M_BASE_ADDR (BAR4_ADDR | FMC1_130M_BASE_RAW_ADDR)
......
...@@ -22,9 +22,11 @@ ...@@ -22,9 +22,11 @@
#include "hutils.h" #include "hutils.h"
#include "hal_stddef.h" #include "hal_stddef.h"
#include "hutils_math.h" #include "hutils_math.h"
#include "varg_macros.h"
/* General dependencies */ /* General dependencies */
#include "board.h" #include "board.h"
#include "epics_mapping.h"
#include "revision.h" #include "revision.h"
#include "acq_chan_gen_defs.h" #include "acq_chan_gen_defs.h"
......
...@@ -20,6 +20,9 @@ extern char *dmngr_verbose_str; ...@@ -20,6 +20,9 @@ extern char *dmngr_verbose_str;
extern int dmngr_verbose; extern int dmngr_verbose;
extern char *dmngr_daemonize_str; extern char *dmngr_daemonize_str;
extern int dmngr_daemonize; extern int dmngr_daemonize;
extern char *dmngr_work_dir;
extern char *dmngr_spawn_broker_cfg_str;
extern int dmngr_spawn_broker_cfg;
/* Signal handler function pointer */ /* Signal handler function pointer */
typedef void (*sig_handler_fp)(int sig, siginfo_t *siginfo, void *context); typedef void (*sig_handler_fp)(int sig, siginfo_t *siginfo, void *context);
...@@ -68,6 +71,12 @@ dmngr_err_e dmngr_spawn_chld (dmngr_t *self, const char *program, char *const ar ...@@ -68,6 +71,12 @@ dmngr_err_e dmngr_spawn_chld (dmngr_t *self, const char *program, char *const ar
/* Setting all operations at once */ /* Setting all operations at once */
dmngr_err_e dmngr_set_ops (dmngr_t *self, dmngr_ops_t *dmngr_ops); dmngr_err_e dmngr_set_ops (dmngr_t *self, dmngr_ops_t *dmngr_ops);
/* Set configuration filename */
dmngr_err_e dmngr_set_cfg_file (dmngr_t *self, char *cfg_file);
/* Get const reference to configuration filename */
const char * dmngr_get_cfg_file (dmngr_t *self);
/* Clone configuration filename */
char * dmngr_clone_cfg_file (dmngr_t *self);
/* Is broker Running? */ /* Is broker Running? */
bool dmngr_is_broker_running (dmngr_t *self); bool dmngr_is_broker_running (dmngr_t *self);
/* Spawn broker if not running */ /* Spawn broker if not running */
......
/*
* Copyright (C) 2015 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU LGPL, version 3 or any later version.
*/
#ifndef _EPICS_MAPPING_H_
#define _EPICS_MAPPING_H_
#ifdef __cplusplus
extern "C" {
#endif
/* BPM reverse mappping structure */
typedef struct {
int bpm_id;
} board_epics_rev_map_t;
typedef struct {
int telnet_port;
} board_epics_opts_t;
/* EPICS mapping definitions */
extern const board_epics_rev_map_t board_epics_rev_map [NUM_MAX_SLOTS+1][NUM_MAX_BPM_PER_SLOT];
extern const board_epics_opts_t board_epics_opts [NUM_MAX_SLOTS+1][NUM_MAX_BPM_PER_SLOT];
#ifdef __cplusplus
}
#endif
#endif
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
* File : wb_acq_core_regs.h * File : wb_acq_core_regs.h
* Author : auto-generated by wbgen2 from acq_core.wb * Author : auto-generated by wbgen2 from acq_core.wb
* Created : Fri May 16 20:02:39 2014 * Created : Tue Sep 8 19:12:36 2015
* Standard : ANSI C * Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE acq_core.wb THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE acq_core.wb
...@@ -115,16 +115,26 @@ ...@@ -115,16 +115,26 @@
#define ACQ_CORE_TRIG_CFG_INT_TRIG_SEL_R(reg) WBGEN2_GEN_READ(reg, 4, 2) #define ACQ_CORE_TRIG_CFG_INT_TRIG_SEL_R(reg) WBGEN2_GEN_READ(reg, 4, 2)
/* definitions for field: Reserved in reg: Trigger configuration */ /* definitions for field: Reserved in reg: Trigger configuration */
#define ACQ_CORE_TRIG_CFG_RESERVED_MASK WBGEN2_GEN_MASK(6, 10) #define ACQ_CORE_TRIG_CFG_RESERVED_MASK WBGEN2_GEN_MASK(6, 26)
#define ACQ_CORE_TRIG_CFG_RESERVED_SHIFT 6 #define ACQ_CORE_TRIG_CFG_RESERVED_SHIFT 6
#define ACQ_CORE_TRIG_CFG_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 6, 10) #define ACQ_CORE_TRIG_CFG_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 6, 26)
#define ACQ_CORE_TRIG_CFG_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 6, 10) #define ACQ_CORE_TRIG_CFG_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 6, 26)
/* definitions for field: Threshold for internal trigger in reg: Trigger configuration */ /* definitions for register: Trigger data config threshold */
#define ACQ_CORE_TRIG_CFG_INT_TRIG_THRES_MASK WBGEN2_GEN_MASK(16, 16)
#define ACQ_CORE_TRIG_CFG_INT_TRIG_THRES_SHIFT 16 /* definitions for field: Internal trigger threshold glitch filter in reg: Trigger data config threshold */
#define ACQ_CORE_TRIG_CFG_INT_TRIG_THRES_W(value) WBGEN2_GEN_WRITE(value, 16, 16) #define ACQ_CORE_TRIG_DATA_CFG_THRES_FILT_MASK WBGEN2_GEN_MASK(0, 8)
#define ACQ_CORE_TRIG_CFG_INT_TRIG_THRES_R(reg) WBGEN2_GEN_READ(reg, 16, 16) #define ACQ_CORE_TRIG_DATA_CFG_THRES_FILT_SHIFT 0
#define ACQ_CORE_TRIG_DATA_CFG_THRES_FILT_W(value) WBGEN2_GEN_WRITE(value, 0, 8)
#define ACQ_CORE_TRIG_DATA_CFG_THRES_FILT_R(reg) WBGEN2_GEN_READ(reg, 0, 8)
/* definitions for field: Reserved in reg: Trigger data config threshold */
#define ACQ_CORE_TRIG_DATA_CFG_RESERVED_MASK WBGEN2_GEN_MASK(8, 24)
#define ACQ_CORE_TRIG_DATA_CFG_RESERVED_SHIFT 8
#define ACQ_CORE_TRIG_DATA_CFG_RESERVED_W(value) WBGEN2_GEN_WRITE(value, 8, 24)
#define ACQ_CORE_TRIG_DATA_CFG_RESERVED_R(reg) WBGEN2_GEN_READ(reg, 8, 24)
/* definitions for register: Trigger data threshold */
/* definitions for register: Trigger delay */ /* definitions for register: Trigger delay */
...@@ -154,6 +164,8 @@ ...@@ -154,6 +164,8 @@
/* definitions for register: DDR3 Start Address */ /* definitions for register: DDR3 Start Address */
/* definitions for register: DDR3 End Address */
/* definitions for register: Acquisition channel control */ /* definitions for register: Acquisition channel control */
/* definitions for field: Acquisition channel selection in reg: Acquisition channel control */ /* definitions for field: Acquisition channel selection in reg: Acquisition channel control */
...@@ -161,29 +173,35 @@ ...@@ -161,29 +173,35 @@
#define ACQ_CORE_ACQ_CHAN_CTL_WHICH_SHIFT 0 #define ACQ_CORE_ACQ_CHAN_CTL_WHICH_SHIFT 0
#define ACQ_CORE_ACQ_CHAN_CTL_WHICH_W(value) WBGEN2_GEN_WRITE(value, 0, 5) #define ACQ_CORE_ACQ_CHAN_CTL_WHICH_W(value) WBGEN2_GEN_WRITE(value, 0, 5)
#define ACQ_CORE_ACQ_CHAN_CTL_WHICH_R(reg) WBGEN2_GEN_READ(reg, 0, 5) #define ACQ_CORE_ACQ_CHAN_CTL_WHICH_R(reg) WBGEN2_GEN_READ(reg, 0, 5)
/* FIXME: The FPGA firmware is WORD addressed for now */ /* FIXME: The FPGA firmware is BYTE/WORD addressed depending on the board */
/* [0x0]: REG Control register */ /* [0x0]: REG Control register */
#define ACQ_CORE_REG_CTL (0x00000000 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_CTL (0x00000000 >> __WR_SHIFT_FIX__)
/* [0x4]: REG Status register */ /* [0x4]: REG Status register */
#define ACQ_CORE_REG_STA (0x00000004 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_STA (0x00000004 >> __WR_SHIFT_FIX__)
/* [0x8]: REG Trigger configuration */ /* [0x8]: REG Trigger configuration */
#define ACQ_CORE_REG_TRIG_CFG (0x00000008 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_TRIG_CFG (0x00000008 >> __WR_SHIFT_FIX__)
/* [0xc]: REG Trigger delay */ /* [0xc]: REG Trigger data config threshold */
#define ACQ_CORE_REG_TRIG_DLY (0x0000000c >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_TRIG_DATA_CFG (0x0000000c >> __WR_SHIFT_FIX__)
/* [0x10]: REG Software trigger */ /* [0x10]: REG Trigger data threshold */
#define ACQ_CORE_REG_SW_TRIG (0x00000010 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_TRIG_DATA_THRES (0x00000010 >> __WR_SHIFT_FIX__)
/* [0x14]: REG Number of shots */ /* [0x14]: REG Trigger delay */
#define ACQ_CORE_REG_SHOTS (0x00000014 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_TRIG_DLY (0x00000014 >> __WR_SHIFT_FIX__)
/* [0x18]: REG Trigger address register */ /* [0x18]: REG Software trigger */
#define ACQ_CORE_REG_TRIG_POS (0x00000018 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_SW_TRIG (0x00000018 >> __WR_SHIFT_FIX__)
/* [0x1c]: REG Pre-trigger samples */ /* [0x1c]: REG Number of shots */
#define ACQ_CORE_REG_PRE_SAMPLES (0x0000001c >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_SHOTS (0x0000001c >> __WR_SHIFT_FIX__)
/* [0x20]: REG Post-trigger samples */ /* [0x20]: REG Trigger address register */
#define ACQ_CORE_REG_POST_SAMPLES (0x00000020 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_TRIG_POS (0x00000020 >> __WR_SHIFT_FIX__)
/* [0x24]: REG Samples counter */ /* [0x24]: REG Pre-trigger samples */
#define ACQ_CORE_REG_SAMPLES_CNT (0x00000024 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_PRE_SAMPLES (0x00000024 >> __WR_SHIFT_FIX__)
/* [0x28]: REG DDR3 Start Address */ /* [0x28]: REG Post-trigger samples */
#define ACQ_CORE_REG_DDR3_START_ADDR (0x00000028 >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_POST_SAMPLES (0x00000028 >> __WR_SHIFT_FIX__)
/* [0x2c]: REG Acquisition channel control */ /* [0x2c]: REG Samples counter */
#define ACQ_CORE_REG_ACQ_CHAN_CTL (0x0000002c >> __WR_SHIFT_FIX__) #define ACQ_CORE_REG_SAMPLES_CNT (0x0000002c >> __WR_SHIFT_FIX__)
/* [0x30]: REG DDR3 Start Address */
#define ACQ_CORE_REG_DDR3_START_ADDR (0x00000030 >> __WR_SHIFT_FIX__)
/* [0x34]: REG DDR3 End Address */
#define ACQ_CORE_REG_DDR3_END_ADDR (0x00000034 >> __WR_SHIFT_FIX__)
/* [0x38]: REG Acquisition channel control */
#define ACQ_CORE_REG_ACQ_CHAN_CTL (0x00000038 >> __WR_SHIFT_FIX__)
#endif #endif
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
* File : pos_calc_regs.h * File : pos_calc_regs.h
* Author : auto-generated by wbgen2 from wb_pos_calc_regs.wb * Author : auto-generated by wbgen2 from wb_pos_calc_regs.wb
* Created : Fri May 16 20:11:41 2014 * Created : Thu Sep 17 16:29:28 2015
* Standard : ANSI C * Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wb_pos_calc_regs.wb THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wb_pos_calc_regs.wb
...@@ -350,6 +350,8 @@ ...@@ -350,6 +350,8 @@
/* definitions for register: Monit. Q Position Value */ /* definitions for register: Monit. Q Position Value */
/* definitions for register: Monit. Sum Position Value */ /* definitions for register: Monit. Sum Position Value */
/* definitions for register: Monit. Amp/Pos update trigger */
/* [0x0]: REG Config divisor threshold TBT register */ /* [0x0]: REG Config divisor threshold TBT register */
#define POS_CALC_REG_DS_TBT_THRES 0x00000000 #define POS_CALC_REG_DS_TBT_THRES 0x00000000
/* [0x4]: REG Config divisor threshold FOFB register */ /* [0x4]: REG Config divisor threshold FOFB register */
...@@ -406,4 +408,6 @@ ...@@ -406,4 +408,6 @@
#define POS_CALC_REG_DSP_MONIT_POS_Q 0x00000068 #define POS_CALC_REG_DSP_MONIT_POS_Q 0x00000068
/* [0x6c]: REG Monit. Sum Position Value */ /* [0x6c]: REG Monit. Sum Position Value */
#define POS_CALC_REG_DSP_MONIT_POS_SUM 0x0000006c #define POS_CALC_REG_DSP_MONIT_POS_SUM 0x0000006c
/* [0x70]: REG Monit. Amp/Pos update trigger */
#define POS_CALC_REG_DSP_MONIT_UPDT 0x00000070
#endif #endif
...@@ -11,12 +11,12 @@ fi ...@@ -11,12 +11,12 @@ fi
if [ $# -ne $EXPECTED_ARGS ] if [ $# -ne $EXPECTED_ARGS ]
then then
echo "Usage: `basename $0` {broker endpoint}" echo "Usage: `basename $0` {cfg file}"
exit 1; exit 1;
fi fi
broker_endp=$1 cfg_file=$1
valgrind --leak-check=yes --trace-children=yes \ valgrind --leak-check=yes --trace-children=yes \
--suppressions=valgrind.supp ./dev_mngr "ipc://"$broker_endp > \ --suppressions=valgrind.supp ./dev_mngr -f $cfg_file > \
valgrind_report.txt 2>&1 valgrind_report.txt 2>&1
EPICS_HOST_ARCH="linux-x86_64"
EPICS_FOLDER="/opt/epics"
EPICS_BASE="${EPICS_FOLDER}/base"
EPICS_TOPDIR="${EPICS_BASE}"
EPICS_BIN="${EPICS_BASE}/bin/${EPICS_HOST_ARCH}"
#export EPICS_CA_ADDR_LIST="127.0.0.1 10.2.117.255 10.2.105.255 10.0.17.255"
#export EPICS_CA_AUTO_ADDR_LIST="YES"
#LINUX_HOSTNAME=$(hostname)
EPICS_HOSTNAME="SIDI-BPM-01"
BPM_EPICS_STARTUP="/opt/epics/startup/ioc/bpm-epics-ioc/iocBoot/iocBPM"
EPICS_EXTENSIONS="/opt/epics/extensions"
EPICS_EXTENSIONS_BIN="/opt/epics/extensions/bin/${EPICS_HOST_ARCH}"
EPICS_CA_MAX_ARRAY_BYTES="50000000"
PATH=${PATH}:/usr/local/bin
[Unit]
Description=BPM-SW server instance %I
After=network-online.target
Wants=network-online.target
After=media-remote_logs.mount
Requires=media-remote_logs.mount
BindsTo=dev-fpga%i.device
After=dev-fpga%i.device
[Service]
EnvironmentFile=/etc/sysconfig/bpm-sw
ExecStart=/usr/local/bin/dev_io -f /usr/local/etc/bpm_sw/bpm_sw.cfg -n be -t pcie -i %i -e /dev/fpga%i -s 0 -b tcp://127.0.0.1:8978 -l /media/remote_logs
WorkingDirectory=/usr/local/bin
#[Install]
#WantedBy=multi-user.target
#!/usr/bin/env bash
killall dev_io
killall malamute
killall dev_mngr
...@@ -19,6 +19,6 @@ expect fork ...@@ -19,6 +19,6 @@ expect fork
script script
# My startup script, plain old shell scripting here. # My startup script, plain old shell scripting here.
exec /usr/local/bin/dev_mngr & exec /usr/local/bin/dev_mngr -f /usr/local/etc/bpm_sw/bpm_sw.cfg &
#emit fcs_server_running #emit fcs_server_running
end script end script
...@@ -6,7 +6,8 @@ After=media-remote_logs.mount ...@@ -6,7 +6,8 @@ After=media-remote_logs.mount
Requires=media-remote_logs.mount Requires=media-remote_logs.mount
[Service] [Service]
ExecStart=/usr/local/bin/dev_mngr EnvironmentFile=/etc/sysconfig/bpm-sw
ExecStart=/usr/local/bin/dev_mngr -f /usr/local/etc/bpm_sw/bpm_sw.cfg
WorkingDirectory=/usr/local/bin WorkingDirectory=/usr/local/bin
[Install] [Install]
......
function find_acq_non_consecutive(filename)
data=load(filename);
for n = 1:size(data,2)
find_non_consecutive(data(:,n)')
end
end
function x = find_non_consecutive(a)
p = find(diff(a)!=1);
x = [p;p+1];
end
board_DIR = $(SRC_DIR)/boards/afcv3
board_OBJS = $(board_DIR)/epics_mapping.o
/*
* Copyright (C) 2015 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU LGPL, version 3 or any later version.
*/
#include "bpm_server.h"
/* Undef ASSERT_ALLOC to avoid conflicting with other ASSERT_ALLOC */
#ifdef ASSERT_TEST
#undef ASSERT_TEST
#endif
#define ASSERT_TEST(test_boolean, err_str, err_goto_label, /* err_core */ ...) \
ASSERT_HAL_TEST(test_boolean, DEV_IO, "[dev_io:epics]", \
err_str, err_goto_label, /* err_core */ __VA_ARGS__)
#ifdef ASSERT_ALLOC
#undef ASSERT_ALLOC
#endif
#define ASSERT_ALLOC(ptr, err_goto_label, /* err_core */ ...) \
ASSERT_HAL_ALLOC(ptr, DEV_IO, "[dev_io:epics]", \
devio_err_str(DEVIO_ERR_ALLOC), \
err_goto_label, /* err_core */ __VA_ARGS__)
#ifdef CHECK_ERR
#undef CHECK_ERR
#endif
#define CHECK_ERR(err, err_type) \
CHECK_HAL_ERR(err, DEV_IO, "[dev_io:epics]", \
devio_err_str (err_type))
/* Reverse bpm-sw <-> EPICS board mapping */
const board_epics_rev_map_t board_epics_rev_map[NUM_MAX_SLOTS+1][NUM_MAX_BPM_PER_SLOT] = {
/* board, bpm */ /* bpm_id */
/* 0, 0 (INVALID) */ {{-1},
/* 0, 1 (INVALID) */ {-1}},
/* 1, 0 */ {{0},
/* 1, 1 */ {1}},
/* 2, 0 */ {{2},
/* 2, 1 */ {3}},
/* 3, 0 */ {{4},
/* 3, 1 */ {5}},
/* 4, 0 */ {{6},
/* 4, 1 */ {7}},
/* 5, 0 */ {{8},
/* 5, 1 */ {9}},
/* 6, 0 */ {{10},
/* 6, 1 */ {11}},
/* 7, 0 */ {{12},
/* 7, 1 */ {13}},
/* 8, 0 */ {{14},
/* 8, 1 */ {15}},
/* 9, 0 */ {{16},
/* 9, 1 */ {17}},
/* 10, 0 */ {{18},
/* 10, 1 */ {19}},
/* 11, 0 */ {{20},
/* 11, 1 */ {21}},
/* 12, 0 */ {{22},
/* 12, 1 */ {23}}
};
const board_epics_opts_t board_epics_opts[NUM_MAX_SLOTS+1][NUM_MAX_BPM_PER_SLOT] = {
/* board, bpm */ /* bpm_id */
/* 0, 0 (INVALID) */ {{-1},
/* 0, 1 (INVALID) */ {-1}},
/* 1, 0 */ {{20000 + 0},
/* 1, 1 */ {20000 + 1}},
/* 2, 0 */ {{20000 + 2},
/* 2, 1 */ {20000 + 3}},
/* 3, 0 */ {{20000 + 4},
/* 3, 1 */ {20000 + 5}},
/* 4, 0 */ {{20000 + 6},
/* 4, 1 */ {20000 + 7}},
/* 5, 0 */ {{20000 + 8},
/* 5, 1 */ {20000 + 9}},
/* 6, 0 */ {{20000 + 10},
/* 6, 1 */ {20000 + 11}},
/* 7, 0 */ {{20000 + 12},
/* 7, 1 */ {20000 + 13}},
/* 8, 0 */ {{20000 + 14},
/* 8, 1 */ {20000 + 15}},
/* 9, 0 */ {{20000 + 16},
/* 9, 1 */ {20000 + 17}},
/* 10, 0 */ {{20000 + 18},
/* 10, 1 */ {20000 + 19}},
/* 11, 0 */ {{20000 + 20},
/* 11, 1 */ {20000 + 21}},
/* 12, 0 */ {{20000 + 22},
/* 12, 1 */ {20000 + 23}}
};
board_DIR = $(SRC_DIR)/boards/ml605
board_OBJS = $(board_DIR)/epics_mapping.o
/*
* Copyright (C) 2015 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU LGPL, version 3 or any later version.
*/
#include "bpm_server.h"
/* Undef ASSERT_ALLOC to avoid conflicting with other ASSERT_ALLOC */
#ifdef ASSERT_TEST
#undef ASSERT_TEST
#endif
#define ASSERT_TEST(test_boolean, err_str, err_goto_label, /* err_core */ ...) \
ASSERT_HAL_TEST(test_boolean, DEV_IO, "[dev_io:epics]", \
err_str, err_goto_label, /* err_core */ __VA_ARGS__)
#ifdef ASSERT_ALLOC
#undef ASSERT_ALLOC
#endif
#define ASSERT_ALLOC(ptr, err_goto_label, /* err_core */ ...) \
ASSERT_HAL_ALLOC(ptr, DEV_IO, "[dev_io:epics]", \
devio_err_str(DEVIO_ERR_ALLOC), \
err_goto_label, /* err_core */ __VA_ARGS__)
#ifdef CHECK_ERR
#undef CHECK_ERR
#endif
#define CHECK_ERR(err, err_type) \
CHECK_HAL_ERR(err, DEV_IO, "[dev_io:epics]", \
devio_err_str (err_type))
/* Reverse bpm-sw <-> EPICS board mapping */
const board_epics_rev_map_t board_epics_rev_map[NUM_MAX_SLOTS+1][NUM_MAX_BPM_PER_SLOT] = {
/* board, bpm */ /* bpm_id */
/* 0, 0 (INVALID) */ {{-1},
/* 0, 1 (INVALID) */ {-1}},
/* 1, 0 */ {{0},
/* 1, 1 */ {1}}
};
const board_epics_opts_t board_epics_opts[NUM_MAX_SLOTS+1][NUM_MAX_BPM_PER_SLOT] = {
/* board, bpm */ /* bpm_id */
/* 0, 0 (INVALID) */ {{-1},
/* 0, 1 (INVALID) */ {-1}},
/* 1, 0 */ {{20000 + 0},
/* 1, 1 */ {20000 + 1}}
};
revision_DIR = $(SRC_DIR)/revision
revision_OBJS = $(revision_DIR)/revision.o
This diff is collapsed.
...@@ -36,21 +36,10 @@ ...@@ -36,21 +36,10 @@
#define DFLT_LOG_DIR "stdout" #define DFLT_LOG_DIR "stdout"
#ifdef __CFG_DIR__
#define CFG_DIR STRINGIFY(__CFG_DIR__)
#else
#error "Config directory not defined!"
#endif
#ifdef __CFG_FILENAME__
#define CFG_FILENAME STRINGIFY(__CFG_FILENAME__)
#else
#error "Config filename not defined!"
#endif
void print_help (char *program_name) void print_help (char *program_name)
{ {
printf( "Usage: %s [options]\n" printf( "Usage: %s [options]\n"
"\t-f Configuration file\n"
"\t-h This help message\n" "\t-h This help message\n"
"\n\t Most of the options resides at the bpm_sw configuration file,\n" "\n\t Most of the options resides at the bpm_sw configuration file,\n"
"typically located in /etc/bpm_sw", program_name); "typically located in /etc/bpm_sw", program_name);
...@@ -58,16 +47,34 @@ void print_help (char *program_name) ...@@ -58,16 +47,34 @@ void print_help (char *program_name)
int main (int argc, char *argv[]) int main (int argc, char *argv[])
{ {
char *cfg_file = NULL;
char **str_p = NULL;
int i;
if (argc < 3) {
print_help (argv[0]);
exit (1);
}
/* Simple handling of command-line options. This should be done /* Simple handling of command-line options. This should be done
* with getopt, for instance*/ * with getopt, for instance*/
int i;
for (i = 1; i < argc; i++) for (i = 1; i < argc; i++)
{ {
if (streq(argv[i], "-h")) if (streq (argv[i], "-f")) {
{ str_p = &cfg_file;
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_TRACE, "[dev_mngr] Will set cfg_file parameter\n");
}
else if (streq(argv[i], "-h")) {
print_help (argv [0]); print_help (argv [0]);
exit (1); exit (1);
} }
/* Fallout for options with parameters */
else {
if (str_p) {
*str_p = strdup (argv[i]);
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_TRACE, "[dev_mngr] Parameter set to \"%s\"\n", *str_p);
}
}
} }
zhash_t *dmngr_hints = zhash_new (); zhash_t *dmngr_hints = zhash_new ();
...@@ -82,7 +89,7 @@ int main (int argc, char *argv[]) ...@@ -82,7 +89,7 @@ int main (int argc, char *argv[])
/**************************************************************************/ /**************************************************************************/
/* Check for field not found */ /* Check for field not found */
zconfig_t *root_cfg = zconfig_load (CFG_DIR "/" CFG_FILENAME); zconfig_t *root_cfg = zconfig_load (cfg_file);
if (root_cfg == NULL) { if (root_cfg == NULL) {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Could not load " DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Could not load "
"configuration file\n"); "configuration file\n");
...@@ -171,37 +178,56 @@ int main (int argc, char *argv[]) ...@@ -171,37 +178,56 @@ int main (int argc, char *argv[])
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_INFO, DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_INFO,
"[dev_mngr] Daemonize set to \"%d\"\n", dmngr_daemonize); "[dev_mngr] Daemonize set to \"%d\"\n", dmngr_daemonize);
/* Read DEVIO suggested bind endpoints and fill the hash table with /* Read the work directory for daemon only */
* the corresponding keys */ if (dmngr_daemonize == 1) {
hutils_err_e herr = hutils_get_hints (root_cfg, dmngr_hints); dmngr_work_dir = zconfig_resolve (root_cfg, "/dev_mngr/workdir", NULL);
if (herr != HUTILS_SUCCESS) {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Could not get hints " /* Set default logfile. We accept NULL as stdout */
"from configuration file\n"); if (dmngr_work_dir == NULL) {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL,
"[dev_mngr] Could not find workdir in configuration "
"file\n");
goto err_cfg_exit; goto err_cfg_exit;
} }
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_INFO,
"[dev_mngr] Work directory set to \"%s\"\n", dmngr_work_dir);
}
/* Read spawn broker parameter */
dmngr_spawn_broker_cfg_str = zconfig_resolve (root_cfg, "/dev_mngr/spawn_broker", NULL);
/* Check for field not found */ /* Check for field not found */
if (dmngr_daemonize_str== NULL) { if (dmngr_spawn_broker_cfg_str== NULL) {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Could not find " DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Could not find "
"daemonize in configuration file\n"); "spawn_broker in configuration file\n");
goto err_cfg_exit; goto err_cfg_exit;
} }
else { else {
if (streq (dmngr_daemonize_str, "yes")) { if (streq (dmngr_spawn_broker_cfg_str, "yes")) {
dmngr_daemonize = 1; dmngr_spawn_broker_cfg = 1;
} }
else if (streq (dmngr_daemonize_str, "no")) { else if (streq (dmngr_spawn_broker_cfg_str, "no")) {
dmngr_daemonize = 0; dmngr_spawn_broker_cfg = 0;
} }
else { else {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Invalid option " DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Invalid option "
"for daemonize configuration variable\n"); "for spawn_broker configuration variable\n");
goto err_cfg_exit; goto err_cfg_exit;
} }
} }
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_INFO, DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_INFO,
"[dev_mngr] Daemonize set to \"%d\"\n", dmngr_daemonize); "[dev_mngr] spawn_broker set to \"%d\"\n", dmngr_spawn_broker_cfg);
/* Read DEVIO suggested bind endpoints and fill the hash table with
* the corresponding keys */
hutils_err_e herr = hutils_get_hints (root_cfg, dmngr_hints);
if (herr != HUTILS_SUCCESS) {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Could not get hints "
"from configuration file\n");
goto err_cfg_exit;
}
/**************************************************************************/ /**************************************************************************/
/********************** END of configuration variables ********************/ /********************** END of configuration variables ********************/
...@@ -209,10 +235,10 @@ int main (int argc, char *argv[]) ...@@ -209,10 +235,10 @@ int main (int argc, char *argv[])
/* Daemonize dev_mngr */ /* Daemonize dev_mngr */
if (dmngr_daemonize != 0) { if (dmngr_daemonize != 0) {
int rc = daemon(0, 0); int rc = zsys_daemonize (dmngr_work_dir);
if (rc != 0) { if (rc != 0) {
perror ("[dev_mngr] daemon"); DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Fail to daemonize\n");
goto err_daemonize; goto err_daemonize;
} }
} }
...@@ -226,6 +252,12 @@ int main (int argc, char *argv[]) ...@@ -226,6 +252,12 @@ int main (int argc, char *argv[])
goto err_dmngr_alloc; goto err_dmngr_alloc;
} }
dmngr_err_e err = dmngr_set_cfg_file (dmngr, cfg_file);
if (err != DMNGR_SUCCESS) {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Fail set configuration file\n");
goto err_dmngr_set_cfg_file;
}
#if 0 #if 0
dmngr_sig_handler_t dmngr_sigkill_handler = dmngr_sig_handler_t dmngr_sigkill_handler =
{ .signal = SIGKILL, { .signal = SIGKILL,
...@@ -250,7 +282,7 @@ int main (int argc, char *argv[]) ...@@ -250,7 +282,7 @@ int main (int argc, char *argv[])
dmngr_set_wait_clhd_handler (dmngr, &hutils_wait_chld); dmngr_set_wait_clhd_handler (dmngr, &hutils_wait_chld);
dmngr_set_spawn_clhd_handler (dmngr, &hutils_spawn_chld); dmngr_set_spawn_clhd_handler (dmngr, &hutils_spawn_chld);
dmngr_err_e err = dmngr_register_sig_handlers (dmngr); err = dmngr_register_sig_handlers (dmngr);
if (err != DMNGR_SUCCESS) { if (err != DMNGR_SUCCESS) {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] dmngr_register_sig_handler error!\n"); DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] dmngr_register_sig_handler error!\n");
goto err_sig_handlers; goto err_sig_handlers;
...@@ -270,11 +302,13 @@ int main (int argc, char *argv[]) ...@@ -270,11 +302,13 @@ int main (int argc, char *argv[])
/* DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_TRACE, "[dev_mngr] ., PID: %d\n", getpid()); */ /* DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_TRACE, "[dev_mngr] ., PID: %d\n", getpid()); */
/* Spawn the broker if not running */ /* Spawn the broker if not running */
if (dmngr_spawn_broker_cfg == 1) {
err = dmngr_spawn_broker (dmngr, dmngr_broker_endp); err = dmngr_spawn_broker (dmngr, dmngr_broker_endp);
if (err != DMNGR_SUCCESS) { if (err != DMNGR_SUCCESS) {
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Could not spwan broker!\n"); DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Could not spwan broker!\n");
goto err_spawn_broker; goto err_spawn_broker;
} }
}
/* Search for new devices */ /* Search for new devices */
err = dmngr_scan_devs (dmngr, NULL); err = dmngr_scan_devs (dmngr, NULL);
...@@ -313,13 +347,15 @@ err_scan_devs: ...@@ -313,13 +347,15 @@ err_scan_devs:
err_spawn_broker: err_spawn_broker:
err_sig_handlers: err_sig_handlers:
dmngr_destroy (&dmngr); dmngr_destroy (&dmngr);
err_dmngr_set_cfg_file:
err_dmngr_alloc: err_dmngr_alloc:
err_daemonize: err_daemonize:
zconfig_destroy (&root_cfg); zconfig_destroy (&root_cfg);
err_cfg_exit: err_cfg_exit:
zhash_destroy (&dmngr_hints); zhash_destroy (&dmngr_hints);
err_dmngr_hints_alloc: err_dmngr_hints_alloc:
str_p = &cfg_file;
free (*str_p);
DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Exiting ...\n"); DBE_DEBUG (DBG_DEV_MNGR | DBG_LVL_FATAL, "[dev_mngr] Exiting ...\n");
return 0; return 0;
......
...@@ -71,6 +71,7 @@ struct _dmngr_t { ...@@ -71,6 +71,7 @@ struct _dmngr_t {
zsock_t *dealer; /* zeroMQ Dealer socket */ zsock_t *dealer; /* zeroMQ Dealer socket */
char *name; /* Identification of this dmngr instance */ char *name; /* Identification of this dmngr instance */
char *endpoint; /* Endpoint to connect to */ char *endpoint; /* Endpoint to connect to */
char *cfg_file; /* Configuration file location */
int verbose; /* Print activity to stdout */ int verbose; /* Print activity to stdout */
/* General management operations */ /* General management operations */
...@@ -92,6 +93,9 @@ char *dmngr_verbose_str = NULL; ...@@ -92,6 +93,9 @@ char *dmngr_verbose_str = NULL;
int dmngr_verbose = 0; int dmngr_verbose = 0;
char *dmngr_daemonize_str = NULL; char *dmngr_daemonize_str = NULL;
int dmngr_daemonize = 0; int dmngr_daemonize = 0;
char *dmngr_work_dir = NULL;
char *dmngr_spawn_broker_cfg_str = NULL;
int dmngr_spawn_broker_cfg = 0;
static void _devio_hash_free_item (void *data); static void _devio_hash_free_item (void *data);
static dmngr_err_e _dmngr_scan_devs (dmngr_t *self, uint32_t *num_devs_found); static dmngr_err_e _dmngr_scan_devs (dmngr_t *self, uint32_t *num_devs_found);
...@@ -301,6 +305,40 @@ dmngr_err_e dmngr_set_ops (dmngr_t *self, dmngr_ops_t *dmngr_ops) ...@@ -301,6 +305,40 @@ dmngr_err_e dmngr_set_ops (dmngr_t *self, dmngr_ops_t *dmngr_ops)
return DMNGR_SUCCESS; return DMNGR_SUCCESS;
} }
dmngr_err_e dmngr_set_cfg_file (dmngr_t *self, char *cfg_file)
{
assert (self);
assert (cfg_file);
dmngr_err_e err = DMNGR_SUCCESS;
/* Free previously allocated file */
if (self->cfg_file != NULL) {
free (self->cfg_file);
self->cfg_file = NULL;
}
self->cfg_file = strdup (cfg_file);
ASSERT_ALLOC(self->cfg_file, err_set_cfg_file);
err_set_cfg_file:
return err;
}
const char * dmngr_get_cfg_file (dmngr_t *self)
{
assert (self);
return self->cfg_file;
}
char * dmngr_clone_cfg_file (dmngr_t *self)
{
assert (self);
char *cfg_file_cpy = strdup (self->cfg_file);
return cfg_file_cpy;
}
static bool _dmngr_is_broker_running (dmngr_t *self) static bool _dmngr_is_broker_running (dmngr_t *self)
{ {
assert (self); assert (self);
...@@ -360,6 +398,7 @@ dmngr_err_e dmngr_spawn_all_devios (dmngr_t *self, char *broker_endp, ...@@ -360,6 +398,7 @@ dmngr_err_e dmngr_spawn_all_devios (dmngr_t *self, char *broker_endp,
assert (broker_endp); assert (broker_endp);
dmngr_err_e err = DMNGR_SUCCESS; dmngr_err_e err = DMNGR_SUCCESS;
char *cfg_file = self->cfg_file;
char *dev_type_c = NULL; char *dev_type_c = NULL;
char *devio_type_c = NULL; char *devio_type_c = NULL;
char *dev_id_c = NULL; char *dev_id_c = NULL;
...@@ -430,7 +469,7 @@ dmngr_err_e dmngr_spawn_all_devios (dmngr_t *self, char *broker_endp, ...@@ -430,7 +469,7 @@ dmngr_err_e dmngr_spawn_all_devios (dmngr_t *self, char *broker_endp,
" for a %s device \n\tlocated on %s, ID %u, broker address %s, with " " for a %s device \n\tlocated on %s, ID %u, broker address %s, with "
"logfile on %s ...\n", dev_type_c, dev_pathname, id, "logfile on %s ...\n", dev_type_c, dev_pathname, id,
broker_endp, devio_log_prefix); broker_endp, devio_log_prefix);
char *argv_exec [] = {DEVIO_NAME, "-n", devio_type_c,"-t", dev_type_c, char *argv_exec [] = {DEVIO_NAME, "-f", cfg_file, "-n", devio_type_c,"-t", dev_type_c,
"-i", dev_id_c, "-e", dev_pathname, "-s", smio_inst_id_c, "-i", dev_id_c, "-e", dev_pathname, "-s", smio_inst_id_c,
"-b", broker_endp, "-l", devio_log_prefix, NULL}; "-b", broker_endp, "-l", devio_log_prefix, NULL};
int spawn_err = _dmngr_spawn_chld (self, DEVIO_NAME, argv_exec); int spawn_err = _dmngr_spawn_chld (self, DEVIO_NAME, argv_exec);
...@@ -503,8 +542,7 @@ static dmngr_err_e _dmngr_scan_devs (dmngr_t *self, uint32_t *num_devs_found) ...@@ -503,8 +542,7 @@ static dmngr_err_e _dmngr_scan_devs (dmngr_t *self, uint32_t *num_devs_found)
/* This follows the hierarchy found in the config file */ /* This follows the hierarchy found in the config file */
int errs = snprintf (key, sizeof (key), HUTILS_CFG_HASH_KEY_PATTERN_COMPL, int errs = snprintf (key, sizeof (key), HUTILS_CFG_HASH_KEY_PATTERN_COMPL,
devio_info_id, /* BPM ID does not matter for DBE DEVIOs */ 0, devio_info_id, /* BPM ID does not matter for DBE DEVIOs */ 0);
HUTILS_CFG_DBE);
/* Only when the number of characters written is less than the whole buffer, /* Only when the number of characters written is less than the whole buffer,
* it is guaranteed that the string was written successfully */ * it is guaranteed that the string was written successfully */
......
This diff is collapsed.
...@@ -39,6 +39,7 @@ ...@@ -39,6 +39,7 @@
static char *_hutils_concat_strings_raw (const char *str1, const char* str2, static char *_hutils_concat_strings_raw (const char *str1, const char* str2,
const char *str3, bool with_sep, char sep); const char *str3, bool with_sep, char sep);
static void _hutils_hints_free_item (void *data);
/*******************************************************************/ /*******************************************************************/
/***************** String manipulation functions ******************/ /***************** String manipulation functions ******************/
...@@ -73,13 +74,25 @@ char *hutils_stringify_key (uint32_t key, uint32_t base) ...@@ -73,13 +74,25 @@ char *hutils_stringify_key (uint32_t key, uint32_t base)
char *key_c = zmalloc (key_len * sizeof (char)); char *key_c = zmalloc (key_len * sizeof (char));
ASSERT_ALLOC (key_c, err_key_c_alloc); ASSERT_ALLOC (key_c, err_key_c_alloc);
switch (base) {
case 10:
snprintf(key_c, key_len, "%u", key);
break;
case 16:
snprintf(key_c, key_len, "%x", key); snprintf(key_c, key_len, "%x", key);
/* DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_TRACE, break;
"[hutils:stringify_key] key = %s, key_len = %u\n",
key_c, key_len); */ default:
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_ERR,
"[hutils:stringify_key] invalid base = %u\n",
base);
goto err_inv_base;
}
return key_c; return key_c;
err_inv_base:
err_key_c_alloc: err_key_c_alloc:
return NULL; return NULL;
} }
...@@ -296,6 +309,13 @@ err_copy_str: ...@@ -296,6 +309,13 @@ err_copy_str:
/********************* ZCONFIG read functions *********************/ /********************* ZCONFIG read functions *********************/
/*******************************************************************/ /*******************************************************************/
/* Hash free function */
static void _hutils_hints_free_item (void *data)
{
hutils_hints_t *item = data;
free (item->bind);
}
/* Get properties from config file (defined in http://rfc.zeromq.org/spec:4) /* Get properties from config file (defined in http://rfc.zeromq.org/spec:4)
* and store them in hash table in the form <property name / property value> */ * and store them in hash table in the form <property name / property value> */
hutils_err_e hutils_get_hints (zconfig_t *root_cfg, zhash_t *hints_h) hutils_err_e hutils_get_hints (zconfig_t *root_cfg, zhash_t *hints_h)
...@@ -304,6 +324,7 @@ hutils_err_e hutils_get_hints (zconfig_t *root_cfg, zhash_t *hints_h) ...@@ -304,6 +324,7 @@ hutils_err_e hutils_get_hints (zconfig_t *root_cfg, zhash_t *hints_h)
assert (hints_h); assert (hints_h);
hutils_err_e err = HUTILS_SUCCESS; hutils_err_e err = HUTILS_SUCCESS;
hutils_hints_t *item = NULL;
/* Read DEVIO suggested bind endpoints and fill the hash table with /* Read DEVIO suggested bind endpoints and fill the hash table with
* the corresponding keys */ * the corresponding keys */
...@@ -335,38 +356,81 @@ hutils_err_e hutils_get_hints (zconfig_t *root_cfg, zhash_t *hints_h) ...@@ -335,38 +356,81 @@ hutils_err_e hutils_get_hints (zconfig_t *root_cfg, zhash_t *hints_h)
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_TRACE, "Config file: " DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_TRACE, "Config file: "
"bpm_cfg name: %s\n", zconfig_name (bpm_cfg)); "bpm_cfg name: %s\n", zconfig_name (bpm_cfg));
/* Create hash item */
item = (hutils_hints_t *) zmalloc (sizeof *item);
ASSERT_ALLOC(item, err_hash_item_alloc, HUTILS_ERR_ALLOC);
/* Now, we expect to find the bind address of this bpm/board instance /* Now, we expect to find the bind address of this bpm/board instance
* in the configuration file */ * in the configuration file */
char *hints_value = zconfig_resolve (bpm_cfg, "/afe/bind", char *afe_bind = zconfig_resolve (bpm_cfg, "/afe/bind",
NULL); NULL);
ASSERT_TEST (hints_value != NULL, "[dev_mngr] Could not find " ASSERT_TEST (afe_bind != NULL, "[hutils:utils] Could not find "
"AFE bind address in configuration file", err_cfg_exit, "AFE bind address (bind = <value>) in configuration file", err_afe_bind,
HUTILS_ERR_CFG); HUTILS_ERR_CFG);
item->bind = strdup (afe_bind);
ASSERT_ALLOC(item->bind, err_hash_bind_alloc, HUTILS_ERR_ALLOC);
/* Read if the user ask us to spawn the EPICS IOC in the
* configuration file */
char *spawn_epics_ioc = zconfig_resolve (bpm_cfg, "/spawn_epics_ioc",
NULL);
ASSERT_TEST (spawn_epics_ioc != NULL, "[hutils:utils] Could not find "
"EPICS IOC (spwan_epics_ioc = <value>) in configuration file",
err_spawn_epics_ioc, HUTILS_ERR_CFG);
/* Convert yes/no to bool */
if (streq (spawn_epics_ioc, "yes")) {
item->spawn_epics_ioc = 1;
}
else if (streq (spawn_epics_ioc, "no")) {
item->spawn_epics_ioc = 0;
}
else {
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_FATAL, "[dev_mngr] Invalid option "
"for spawn_epics_ioc configuration variable\n");
goto err_inv_spawn_epics_ioc;
}
/* Now, we only need to generate a valid key to insert in the hash. /* Now, we only need to generate a valid key to insert in the hash.
* we choose the combination of the type "board%u/bpm%u/afe" or * we choose the combination of the type "board%u/bpm%u/afe" or
* board%u/bpm%u/dbe */ * board%u/bpm%u/dbe */
char hints_key [HUTILS_CFG_HASH_KEY_MAX_LEN]; char hints_key [HUTILS_CFG_HASH_KEY_MAX_LEN];
int errs = snprintf (hints_key, sizeof (hints_key), int errs = snprintf (hints_key, sizeof (hints_key),
HUTILS_CFG_HASH_KEY_PATTERN, zconfig_name (board_cfg), HUTILS_CFG_HASH_KEY_PATTERN, zconfig_name (board_cfg),
zconfig_name (bpm_cfg), HUTILS_CFG_AFE); zconfig_name (bpm_cfg));
/* Only when the number of characters written is less than the whole buffer, /* Only when the number of characters written is less than the whole buffer,
* it is guaranteed that the string was written successfully */ * it is guaranteed that the string was written successfully */
ASSERT_TEST (errs >= 0 && (size_t) errs < sizeof (hints_key), ASSERT_TEST (errs >= 0 && (size_t) errs < sizeof (hints_key),
"[dev_mngr] Could not generate AFE bind address from " "[hutils:utils] Could not generate AFE bind address from "
"configuration file\n", err_cfg_exit, HUTILS_ERR_CFG); "configuration file\n", err_cfg_exit, HUTILS_ERR_CFG);
DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO, "[dev_mngr_core] AFE hint endpoint " DBE_DEBUG (DBG_HAL_UTILS | DBG_LVL_INFO, "[hutils:utils] AFE hint endpoint "
"hash key: \"%s\", value: \"%s\"\n", hints_key, hints_value); "hash key: \"%s\", bind: \"%s\", spawn_epics_ioc: %s\n",
hints_key, afe_bind, spawn_epics_ioc);
/* Insert this value in the hash table */ /* Insert this value in the hash table */
errs = zhash_insert (hints_h, hints_key, hints_value); errs = zhash_insert (hints_h, hints_key, item);
ASSERT_TEST (errs == 0, "Could not find insert AFE endpoint to " ASSERT_TEST (errs == 0, "Could not find insert AFE endpoint to "
"hash table", err_cfg_exit, HUTILS_ERR_CFG); "hash table", err_cfg_exit, HUTILS_ERR_CFG);
/* Setup free function */
zhash_freefn (hints_h, hints_key, _hutils_hints_free_item);
} }
} }
return err;
/* Free only the last item on error. The other ones will be freed by the hash table,
* on destruction */
err_inv_spawn_epics_ioc:
err_spawn_epics_ioc:
free (item->bind);
err_hash_bind_alloc:
err_afe_bind:
free (item);
err_hash_item_alloc:
err_cfg_exit: err_cfg_exit:
return err; return err;
} }
......
...@@ -25,16 +25,16 @@ ...@@ -25,16 +25,16 @@
#define HUTILS_CFG_BPM_TYPE "%s" #define HUTILS_CFG_BPM_TYPE "%s"
#define HUTILS_CFG_BPM_PATTERN "bpm%u" #define HUTILS_CFG_BPM_PATTERN "bpm%u"
#define HUTILS_CFG_DEVIO_MODEL_TYPE "%s" #define HUTILS_CFG_DEVIO_MODEL_TYPE "%s"
#define HUTILS_CFG_AFE "afe"
#define HUTILS_CFG_DBE "dbe"
//#define HUTILS_CFG_HASH_KEY_PATTERN "%s/%s/%s"
#define HUTILS_CFG_HASH_KEY_PATTERN HUTILS_CFG_BOARD_TYPE \ #define HUTILS_CFG_HASH_KEY_PATTERN HUTILS_CFG_BOARD_TYPE \
"/" HUTILS_CFG_BPM_TYPE "/" \ "/" HUTILS_CFG_BPM_TYPE
HUTILS_CFG_DEVIO_MODEL_TYPE
#define HUTILS_CFG_HASH_KEY_PATTERN_COMPL HUTILS_CFG_BOARD_PATTERN \ #define HUTILS_CFG_HASH_KEY_PATTERN_COMPL HUTILS_CFG_BOARD_PATTERN \
"/" HUTILS_CFG_BPM_PATTERN "/" \ "/" HUTILS_CFG_BPM_PATTERN
HUTILS_CFG_DEVIO_MODEL_TYPE
typedef struct {
char *bind; /* AFE Endpoint address to bind to */
bool spawn_epics_ioc; /* DBE IOC spawn selection */
} hutils_hints_t;
/************************ Our methods *****************************/ /************************ Our methods *****************************/
......
...@@ -67,6 +67,7 @@ static ssize_t _pcie_rw_bar4_block_raw (llio_t *self, uint32_t pg_start, uint64_ ...@@ -67,6 +67,7 @@ static ssize_t _pcie_rw_bar4_block_raw (llio_t *self, uint32_t pg_start, uint64_
static ssize_t _pcie_rw_block (llio_t *self, uint64_t offs, size_t size, static ssize_t _pcie_rw_block (llio_t *self, uint64_t offs, size_t size,
uint32_t *data, int rw); uint32_t *data, int rw);
static ssize_t _pcie_timeout_reset (llio_t *self); static ssize_t _pcie_timeout_reset (llio_t *self);
static ssize_t _pcie_reset_fpga (llio_t *self);
/************ Our methods implementation **********/ /************ Our methods implementation **********/
...@@ -179,13 +180,18 @@ static int pcie_open (llio_t *self, llio_endpoint_t *endpoint) ...@@ -179,13 +180,18 @@ static int pcie_open (llio_t *self, llio_endpoint_t *endpoint)
SET_SDRAM_PG(dev_pcie->bar0, 0); SET_SDRAM_PG(dev_pcie->bar0, 0);
SET_WB_PG(dev_pcie->bar0, 0); SET_WB_PG(dev_pcie->bar0, 0);
/* Attach this PCIe device to LLIO instance */
llio_set_dev_handler (self, dev_pcie); llio_set_dev_handler (self, dev_pcie);
/* Signal that the endpoint is opened and ready to work */ /* Signal that the endpoint is opened and ready to work */
llio_set_endpoint_open (self, true); llio_set_endpoint_open (self, true);
DBE_DEBUG (DBG_LL_IO | DBG_LVL_INFO, DBE_DEBUG (DBG_LL_IO | DBG_LVL_INFO,
"[ll_io_pcie] Opened PCIe device located at %s\n", "[ll_io_pcie] Opened PCIe device located at %s\n",
llio_get_endpoint_name (self)); llio_get_endpoint_name (self));
/* Reset FPGA */
_pcie_reset_fpga (self);
return err; return err;
err_dev_handler_alloc: err_dev_handler_alloc:
...@@ -394,6 +400,7 @@ static ssize_t _pcie_rw_bar2_block_raw (llio_t *self, uint32_t pg_start, uint64_ ...@@ -394,6 +400,7 @@ static ssize_t _pcie_rw_bar2_block_raw (llio_t *self, uint32_t pg_start, uint64_
/* Number of bytes read/written, for faster comparison */ /* Number of bytes read/written, for faster comparison */
uint32_t num_bytes_rw = 0; uint32_t num_bytes_rw = 0;
ssize_t err = 0; ssize_t err = 0;
uint32_t *datap = data;
llio_dev_pcie_t *dev_pcie = llio_get_dev_handler (self); llio_dev_pcie_t *dev_pcie = llio_get_dev_handler (self);
ASSERT_TEST(dev_pcie != NULL, "Could not get PCIe handler", ASSERT_TEST(dev_pcie != NULL, "Could not get PCIe handler",
...@@ -408,17 +415,22 @@ static ssize_t _pcie_rw_bar2_block_raw (llio_t *self, uint32_t pg_start, uint64_ ...@@ -408,17 +415,22 @@ static ssize_t _pcie_rw_bar2_block_raw (llio_t *self, uint32_t pg_start, uint64_
pg < (pg_start + (pg_offs+size)/bar_size + 1); pg < (pg_start + (pg_offs+size)/bar_size + 1);
++pg) { ++pg) {
SET_SDRAM_PG (dev_pcie->bar0, pg); SET_SDRAM_PG (dev_pcie->bar0, pg);
uint32_t num_bytes_page = (num_bytes_rem > bar_size) ? uint32_t num_bytes_page = (offs + num_bytes_rem > bar_size) ?
(bar_size-offs) : (num_bytes_rem); (bar_size-offs) : (num_bytes_rem);
num_bytes_rem -= num_bytes_page; num_bytes_rem -= num_bytes_page;
num_bytes_rw += num_bytes_page; num_bytes_rw += num_bytes_page;
DBE_DEBUG (DBG_LL_IO | DBG_LVL_TRACE,
"[ll_io_pcie:_pcie_rw_bar2_block_raw] offs = %u, num_bytes_rem = %u,\n"
"bar_size = %u, num_byte_page = %u\n", offs, num_bytes_rem, bar_size,
num_bytes_page);
DBE_DEBUG (DBG_LL_IO | DBG_LVL_TRACE, DBE_DEBUG (DBG_LL_IO | DBG_LVL_TRACE,
"[ll_io_pcie:_pcie_rw_bar2_block_raw] Reading %u bytes from addr: %p\n" "[ll_io_pcie:_pcie_rw_bar2_block_raw] Reading %u bytes from addr: %p\n"
"-------------------------------------------------------------------------------------\n", "-------------------------------------------------------------------------------------\n",
num_bytes_page, dev_pcie->bar2); num_bytes_page, dev_pcie->bar2);
BAR2_RW_BLOCK(dev_pcie->bar2, offs, num_bytes_page, BAR2_RW_BLOCK(dev_pcie->bar2, offs, num_bytes_page,
(uint32_t *)((uint8_t *)data + (pg-pg_start)*bar_size), rw); datap, rw);
datap = (uint32_t *)((uint8_t *)datap + num_bytes_page);
/* Always 0 after the first page */ /* Always 0 after the first page */
offs = 0; offs = 0;
...@@ -625,6 +637,16 @@ static ssize_t _pcie_timeout_reset (llio_t *self) ...@@ -625,6 +637,16 @@ static ssize_t _pcie_timeout_reset (llio_t *self)
return _pcie_rw_32 (self, offs, &data, WRITE_TO_BAR); return _pcie_rw_32 (self, offs, &data, WRITE_TO_BAR);
} }
static ssize_t _pcie_reset_fpga (llio_t *self)
{
DBE_DEBUG (DBG_LL_IO | DBG_LVL_TRACE,
"[ll_io_pcie:_pcie_reset_fpga] Reseting FPGA\n");
uint64_t offs = BAR0_ADDR | PCIE_CFG_REG_EB_STACON;
uint32_t data = PCIE_CFG_TX_CTRL_CHANNEL_RST;
return _pcie_rw_32 (self, offs, &data, WRITE_TO_BAR);
}
const llio_ops_t llio_ops_pcie = { const llio_ops_t llio_ops_pcie = {
.open = pcie_open, /* Open device */ .open = pcie_open, /* Open device */
.release = pcie_release, /* Release device */ .release = pcie_release, /* Release device */
......
...@@ -25,7 +25,23 @@ struct _smio_acq_data_block_t { ...@@ -25,7 +25,23 @@ struct _smio_acq_data_block_t {
#define ACQ_NAME_GET_DATA_BLOCK "acq_get_data_block" #define ACQ_NAME_GET_DATA_BLOCK "acq_get_data_block"
#define ACQ_OPCODE_CHECK_DATA_ACQUIRE 2 #define ACQ_OPCODE_CHECK_DATA_ACQUIRE 2
#define ACQ_NAME_CHECK_DATA_ACQUIRE "acq_check_data_acquire" #define ACQ_NAME_CHECK_DATA_ACQUIRE "acq_check_data_acquire"
#define ACQ_OPCODE_END 3 #define ACQ_OPCODE_CFG_TRIG 3
#define ACQ_NAME_CFG_TRIG "acq_cfg_trig"
#define ACQ_OPCODE_HW_DATA_TRIG_POL 4
#define ACQ_NAME_HW_DATA_TRIG_POL "acq_hw_data_trig_pol"
#define ACQ_OPCODE_HW_DATA_TRIG_SEL 5
#define ACQ_NAME_HW_DATA_TRIG_SEL "acq_hw_data_trig_sel"
#define ACQ_OPCODE_HW_DATA_TRIG_FILT 6
#define ACQ_NAME_HW_DATA_TRIG_FILT "acq_hw_data_filt"
#define ACQ_OPCODE_HW_DATA_TRIG_THRES 7
#define ACQ_NAME_HW_DATA_TRIG_THRES "acq_hw_data_thres"
#define ACQ_OPCODE_HW_TRIG_DLY 8
#define ACQ_NAME_HW_TRIG_DLY "acq_hw_trig_dly"
#define ACQ_OPCODE_SW_TRIG 9
#define ACQ_NAME_SW_TRIG "acq_sw_trig"
#define ACQ_OPCODE_FSM_STOP 10
#define ACQ_NAME_FSM_STOP "acq_fsm_stop"
#define ACQ_OPCODE_END 11
/* Messaging Reply OPCODES */ /* Messaging Reply OPCODES */
#define ACQ_REPLY_TYPE uint32_t #define ACQ_REPLY_TYPE uint32_t
...@@ -38,6 +54,7 @@ struct _smio_acq_data_block_t { ...@@ -38,6 +54,7 @@ struct _smio_acq_data_block_t {
#define ACQ_BLOCK_OOR 4 /* Block number out of range */ #define ACQ_BLOCK_OOR 4 /* Block number out of range */
#define ACQ_NUM_CHAN_OOR 5 /* Channel number out of range */ #define ACQ_NUM_CHAN_OOR 5 /* Channel number out of range */
#define ACQ_COULD_NOT_READ 6 /* Could not read memory block */ #define ACQ_COULD_NOT_READ 6 /* Could not read memory block */
#define ACQ_REPLY_END 7 /* End marker */ #define ACQ_TRIG_TYPE 7 /* Incompatible trigger type */
#define ACQ_REPLY_END 8 /* End marker */
#endif #endif
...@@ -34,7 +34,8 @@ ...@@ -34,7 +34,8 @@
smio_err_str (err_type)) smio_err_str (err_type))
/* Creates a new instance of Device Information */ /* Creates a new instance of Device Information */
smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples) smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples_pre,
uint32_t num_samples_post, uint32_t num_shots)
{ {
smio_acq_t *self = (smio_acq_t *) zmalloc (sizeof *self); smio_acq_t *self = (smio_acq_t *) zmalloc (sizeof *self);
ASSERT_ALLOC(self, err_self_alloc); ASSERT_ALLOC(self, err_self_alloc);
...@@ -42,7 +43,9 @@ smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples) ...@@ -42,7 +43,9 @@ smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples)
/* Set default value for all channels */ /* Set default value for all channels */
for (uint32_t i = 0; i < END_CHAN_ID; i++) { for (uint32_t i = 0; i < END_CHAN_ID; i++) {
self->acq_params[i].num_samples = num_samples; self->acq_params[i].num_samples_pre = num_samples_pre;
self->acq_params[i].num_samples_post = num_samples_post;
self->acq_params[i].num_shots = num_shots;
} }
/* initilize acquisition buffer areas. Defined in ddr3_map.h */ /* initilize acquisition buffer areas. Defined in ddr3_map.h */
......
...@@ -8,8 +8,33 @@ ...@@ -8,8 +8,33 @@
#ifndef _SM_IO_ACQ_CORE_H_ #ifndef _SM_IO_ACQ_CORE_H_
#define _SM_IO_ACQ_CORE_H_ #define _SM_IO_ACQ_CORE_H_
#define ACQ_CORE_MIN_NUM_SHOTS 1
/* FIXME: This needs to match the FPGA firmware. Otherwise,
* the acq_core module will not start an acquisition and
* the user will be misinformed. If this number is different
* from the FPGA firmware nothing will break, but we will loose
* context of the error */
#define ACQ_CORE_MULTISHOT_MEM_SIZE 2048
typedef enum {
TYPE_ACQ_CORE_SKIP=0,
TYPE_ACQ_CORE_HW_PULSE=1,
TYPE_ACQ_CORE_HW_DATA_DRIVEN,
TYPE_ACQ_CORE_SW,
TYPE_ACQ_CORE_END,
} acq_core_trig_type_e;
#define ACQ_CORE_NUM_TRIGGERS TYPE_ACQ_CORE_END
typedef struct { typedef struct {
uint32_t num_samples; uint32_t num_samples_pre; /* Number of pre-trigger samples */
uint32_t num_samples_post; /* Number of post-trigger samples */
uint32_t num_shots; /* Number of shots */
#if 0
/* Last trigger address. In case of multishot acquisition, this will
contain only the last trigger address*/
uint32_t trig_addr;
#endif
} acq_params_t; } acq_params_t;
typedef struct { typedef struct {
...@@ -20,7 +45,8 @@ typedef struct { ...@@ -20,7 +45,8 @@ typedef struct {
/***************** Our methods *****************/ /***************** Our methods *****************/
/* Creates a new instance of the smio realization */ /* Creates a new instance of the smio realization */
smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples); smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples_pre,
uint32_t num_samples_post, uint32_t num_shots);
/* Destroys the smio realizationn */ /* Destroys the smio realizationn */
smio_err_e smio_acq_destroy (smio_acq_t **self_p); smio_err_e smio_acq_destroy (smio_acq_t **self_p);
......
This diff is collapsed.
...@@ -16,6 +16,8 @@ disp_op_t acq_data_acquire_exp = { ...@@ -16,6 +16,8 @@ disp_op_t acq_data_acquire_exp = {
.retval = DISP_ARG_END, .retval = DISP_ARG_END,
.retval_owner = DISP_OWNER_OTHER, .retval_owner = DISP_OWNER_OTHER,
.args = { .args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t), DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t), DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END DISP_ARG_END
...@@ -44,11 +46,115 @@ disp_op_t acq_get_data_block_exp = { ...@@ -44,11 +46,115 @@ disp_op_t acq_get_data_block_exp = {
} }
}; };
disp_op_t acq_cfg_trig_exp = {
.name = ACQ_NAME_CFG_TRIG,
.opcode = ACQ_OPCODE_CFG_TRIG,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t acq_hw_data_trig_pol_exp = {
.name = ACQ_NAME_HW_DATA_TRIG_POL,
.opcode = ACQ_OPCODE_HW_DATA_TRIG_POL,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t acq_hw_data_trig_sel_exp = {
.name = ACQ_NAME_HW_DATA_TRIG_SEL,
.opcode = ACQ_OPCODE_HW_DATA_TRIG_SEL,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t acq_hw_data_trig_filt_exp = {
.name = ACQ_NAME_HW_DATA_TRIG_FILT,
.opcode = ACQ_OPCODE_HW_DATA_TRIG_FILT,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t acq_hw_data_trig_thres_exp = {
.name = ACQ_NAME_HW_DATA_TRIG_THRES,
.opcode = ACQ_OPCODE_HW_DATA_TRIG_THRES,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t acq_hw_trig_dly_exp = {
.name = ACQ_NAME_HW_TRIG_DLY,
.opcode = ACQ_OPCODE_HW_TRIG_DLY,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t acq_sw_trig_exp = {
.name = ACQ_NAME_SW_TRIG,
.opcode = ACQ_OPCODE_SW_TRIG,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t acq_fsm_stop_exp = {
.name = ACQ_NAME_FSM_STOP,
.opcode = ACQ_OPCODE_FSM_STOP,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
/* Exported function description */ /* Exported function description */
const disp_op_t *acq_exp_ops [] = { const disp_op_t *acq_exp_ops [] = {
&acq_data_acquire_exp, &acq_data_acquire_exp,
&acq_check_data_acquire_exp, &acq_check_data_acquire_exp,
&acq_get_data_block_exp, &acq_get_data_block_exp,
&acq_cfg_trig_exp,
&acq_hw_data_trig_pol_exp,
&acq_hw_data_trig_sel_exp,
&acq_hw_data_trig_filt_exp,
&acq_hw_data_trig_thres_exp,
&acq_hw_trig_dly_exp,
&acq_sw_trig_exp,
&acq_fsm_stop_exp,
NULL NULL
}; };
...@@ -13,6 +13,14 @@ ...@@ -13,6 +13,14 @@
extern disp_op_t acq_data_acquire_exp; extern disp_op_t acq_data_acquire_exp;
extern disp_op_t acq_check_data_acquire_exp; extern disp_op_t acq_check_data_acquire_exp;
extern disp_op_t acq_get_data_block_exp; extern disp_op_t acq_get_data_block_exp;
extern disp_op_t acq_cfg_trig_exp;
extern disp_op_t acq_hw_data_trig_pol_exp;
extern disp_op_t acq_hw_data_trig_sel_exp;
extern disp_op_t acq_hw_data_trig_filt_exp;
extern disp_op_t acq_hw_data_trig_thres_exp;
extern disp_op_t acq_hw_trig_dly_exp;
extern disp_op_t acq_sw_trig_exp;
extern disp_op_t acq_fsm_stop_exp;
extern const disp_op_t *acq_exp_ops []; extern const disp_op_t *acq_exp_ops [];
......
...@@ -40,6 +40,8 @@ ...@@ -40,6 +40,8 @@
#define DSP_NAME_SET_GET_MONIT_POS_Q "dsp_set_get_monit_pos_q" #define DSP_NAME_SET_GET_MONIT_POS_Q "dsp_set_get_monit_pos_q"
#define DSP_OPCODE_SET_GET_MONIT_POS_SUM 13 #define DSP_OPCODE_SET_GET_MONIT_POS_SUM 13
#define DSP_NAME_SET_GET_MONIT_POS_SUM "dsp_set_get_monit_pos_sum" #define DSP_NAME_SET_GET_MONIT_POS_SUM "dsp_set_get_monit_pos_sum"
#define DSP_OPCODE_END 14 #define DSP_OPCODE_SET_GET_MONIT_UPDT 14
#define DSP_NAME_SET_GET_MONIT_UPDT "dsp_set_get_monit_updt"
#define DSP_OPCODE_END 15
#endif #endif
...@@ -163,6 +163,16 @@ RW_PARAM_FUNC(dsp, monit_pos_sum) { ...@@ -163,6 +163,16 @@ RW_PARAM_FUNC(dsp, monit_pos_sum) {
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD); NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
} }
#define POS_CALC_DSP_MONIT_UPDT_R(val) (val)
#define POS_CALC_DSP_MONIT_UPDT_W(val) (val)
#define POS_CALC_DSP_MONIT_UPDT_MASK ((1ULL<<32)-1)
RW_PARAM_FUNC(dsp, monit_updt) {
SET_GET_PARAM(dsp, DSP_CTRL_REGS_OFFS, POS_CALC, DSP_MONIT_UPDT, /* No field */,
MULT_BIT_PARAM, /* No minimum check*/, /* No maximum check */,
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
}
/* Exported function pointers */ /* Exported function pointers */
const disp_table_func_fp dsp_exp_fp [] = { const disp_table_func_fp dsp_exp_fp [] = {
RW_PARAM_FUNC_NAME(dsp, kx), RW_PARAM_FUNC_NAME(dsp, kx),
...@@ -179,6 +189,7 @@ const disp_table_func_fp dsp_exp_fp [] = { ...@@ -179,6 +189,7 @@ const disp_table_func_fp dsp_exp_fp [] = {
RW_PARAM_FUNC_NAME(dsp, monit_pos_y), RW_PARAM_FUNC_NAME(dsp, monit_pos_y),
RW_PARAM_FUNC_NAME(dsp, monit_pos_q), RW_PARAM_FUNC_NAME(dsp, monit_pos_q),
RW_PARAM_FUNC_NAME(dsp, monit_pos_sum), RW_PARAM_FUNC_NAME(dsp, monit_pos_sum),
RW_PARAM_FUNC_NAME(dsp, monit_updt),
NULL NULL
}; };
......
...@@ -178,6 +178,18 @@ disp_op_t dsp_set_get_monit_pos_sum_exp = { ...@@ -178,6 +178,18 @@ disp_op_t dsp_set_get_monit_pos_sum_exp = {
} }
}; };
disp_op_t dsp_set_get_monit_updt_exp = {
.name = DSP_NAME_SET_GET_MONIT_UPDT,
.opcode = DSP_OPCODE_SET_GET_MONIT_UPDT,
.retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
/* Exported function description */ /* Exported function description */
const disp_op_t *dsp_exp_ops [] = { const disp_op_t *dsp_exp_ops [] = {
&dsp_set_get_kx_exp, &dsp_set_get_kx_exp,
...@@ -194,6 +206,7 @@ const disp_op_t *dsp_exp_ops [] = { ...@@ -194,6 +206,7 @@ const disp_op_t *dsp_exp_ops [] = {
&dsp_set_get_monit_pos_y_exp, &dsp_set_get_monit_pos_y_exp,
&dsp_set_get_monit_pos_q_exp, &dsp_set_get_monit_pos_q_exp,
&dsp_set_get_monit_pos_sum_exp, &dsp_set_get_monit_pos_sum_exp,
&dsp_set_get_monit_updt_exp,
NULL NULL
}; };
...@@ -24,6 +24,7 @@ extern disp_op_t dsp_set_get_monit_pos_x_exp; ...@@ -24,6 +24,7 @@ extern disp_op_t dsp_set_get_monit_pos_x_exp;
extern disp_op_t dsp_set_get_monit_pos_y_exp; extern disp_op_t dsp_set_get_monit_pos_y_exp;
extern disp_op_t dsp_set_get_monit_pos_q_exp; extern disp_op_t dsp_set_get_monit_pos_q_exp;
extern disp_op_t dsp_set_get_monit_pos_sum_exp; extern disp_op_t dsp_set_get_monit_pos_sum_exp;
extern disp_op_t dsp_set_get_monit_updt_exp;
extern const disp_op_t *dsp_exp_ops []; extern const disp_op_t *dsp_exp_ops [];
......
...@@ -67,7 +67,7 @@ smio_err_e fmc130m_4ch_config_defaults (char *broker_endp, char *service, ...@@ -67,7 +67,7 @@ smio_err_e fmc130m_4ch_config_defaults (char *broker_endp, char *service,
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not set FMC TRIG DIR function", ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS, "Could not set FMC TRIG DIR function",
err_param_set, SMIO_ERR_CONFIG_DFLT); err_param_set, SMIO_ERR_CONFIG_DFLT);
client_err = bpm_ad9510_cfg_defaults (config_client, service); client_err = bpm_ad9510_cfg_defaults (config_client, service, 0);
ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS || ASSERT_TEST(client_err == BPM_CLIENT_SUCCESS ||
client_err == BPM_CLIENT_ERR_AGAIN, "Could not configure AD9510", client_err == BPM_CLIENT_ERR_AGAIN, "Could not configure AD9510",
err_param_set, SMIO_ERR_CONFIG_DFLT); err_param_set, SMIO_ERR_CONFIG_DFLT);
......
...@@ -53,25 +53,24 @@ ...@@ -53,25 +53,24 @@
} \ } \
}) })
static smch_err_e smch_ad9510_cfg_defaults_compat (smch_ad9510_t *self,
uint32_t *param);
/************************************************************/ /************************************************************/
/************ Specific FMC_130M_4CH Operations **************/ /************ Specific FMC_130M_4CH Operations **************/
/************************************************************/ /************************************************************/
static int _fmc130m_4ch_leds (void *owner, void *args, void *ret)
{
(void) ret;
assert (owner);
assert (args);
SMIO_OWNER_TYPE *self = SMIO_EXP_OWNER(owner); #define BPM_FMC130M_4CH_LEDS_MIN 0 /* LED 0 = 0, LED 1 = 0, LED 3 = 0*/
uint32_t leds = *(uint32_t *) EXP_MSG_ZMQ_FIRST_ARG(args); #define BPM_FMC130M_4CH_LEDS_MAX 7 /* LED 0 = 1, LED 1 = 1, LED 2 = 1*/
#define WB_FMC_130M_4CH_CSR_MONITOR_GLOBAL_MASK WBGEN2_GEN_MASK(1, 3)
#define WB_FMC_130M_4CH_CSR_MONITOR_GLOBAL_W(val) WBGEN2_GEN_WRITE(val, 1, 3)
#define WB_FMC_130M_4CH_CSR_MONITOR_GLOBAL_R(reg) WBGEN2_GEN_READ(reg, 1, 3)
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch] Calling _fmc130m_4ch_leds\n"); RW_PARAM_FUNC(fmc130m_4ch, leds) {
smio_thsafe_client_write_32 (self, FMC_130M_CTRL_REGS_OFFS | SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
WB_FMC_130M_4CH_CSR_REG_MONITOR , &leds); MONITOR, GLOBAL, MULT_BIT_PARAM,
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch] Led write: 0x%08x\n", BPM_FMC130M_4CH_LEDS_MIN, BPM_FMC130M_4CH_LEDS_MAX, NO_CHK_FUNC,
leds); NO_FMT_FUNC, SET_FIELD);
return -FMC130M_4CH_OK;
} }
#define BPM_FMC130M_4CH_SI571_OE_MIN 0 /* SI571 Output disable */ #define BPM_FMC130M_4CH_SI571_OE_MIN 0 /* SI571 Output disable */
...@@ -84,7 +83,6 @@ RW_PARAM_FUNC(fmc130m_4ch, si571_oe) { ...@@ -84,7 +83,6 @@ RW_PARAM_FUNC(fmc130m_4ch, si571_oe) {
NO_FMT_FUNC, SET_FIELD); NO_FMT_FUNC, SET_FIELD);
} }
#define BPM_FMC130M_4CH_PLL_FUNC_MIN 0 /* PLL FUNCTION pin 0 */ #define BPM_FMC130M_4CH_PLL_FUNC_MIN 0 /* PLL FUNCTION pin 0 */
#define BPM_FMC130M_4CH_PLL_FUNC_MAX 1 /* PLL FUNCTION pin 1 */ #define BPM_FMC130M_4CH_PLL_FUNC_MAX 1 /* PLL FUNCTION pin 1 */
...@@ -443,8 +441,8 @@ RW_PARAM_FUNC(fmc130m_4ch, trig_dir) { ...@@ -443,8 +441,8 @@ RW_PARAM_FUNC(fmc130m_4ch, trig_dir) {
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD); NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
} }
#define BPM_FMC130M_4CH_TRIG_TERM_MIN 0 /* Trigger direction input */ #define BPM_FMC130M_4CH_TRIG_TERM_MIN 0 /* Trigger termination disabled */
#define BPM_FMC130M_4CH_TRIG_TERM_MAX 1 /* Trigger direction output */ #define BPM_FMC130M_4CH_TRIG_TERM_MAX 1 /* Trigger termination enabled */
RW_PARAM_FUNC(fmc130m_4ch, trig_term) { RW_PARAM_FUNC(fmc130m_4ch, trig_term) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR, SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
...@@ -453,8 +451,8 @@ RW_PARAM_FUNC(fmc130m_4ch, trig_term) { ...@@ -453,8 +451,8 @@ RW_PARAM_FUNC(fmc130m_4ch, trig_term) {
NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD); NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
} }
#define BPM_FMC130M_4CH_TRIG_VAL_MIN 0 /* Trigger direction input */ #define BPM_FMC130M_4CH_TRIG_VAL_MIN 0 /* Trigger value 0 */
#define BPM_FMC130M_4CH_TRIG_VAL_MAX 1 /* Trigger direction output */ #define BPM_FMC130M_4CH_TRIG_VAL_MAX 1 /* Trigger value 1 */
RW_PARAM_FUNC(fmc130m_4ch, trig_val) { RW_PARAM_FUNC(fmc130m_4ch, trig_val) {
SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR, SET_GET_PARAM(fmc130m_4ch, FMC_130M_CTRL_REGS_OFFS, WB_FMC_130M_4CH_CSR,
...@@ -465,33 +463,6 @@ RW_PARAM_FUNC(fmc130m_4ch, trig_val) { ...@@ -465,33 +463,6 @@ RW_PARAM_FUNC(fmc130m_4ch, trig_val) {
/******************************** Chips Export functions *************************/ /******************************** Chips Export functions *************************/
static int _fmc130m_4ch_ad9510_cfg_defaults (void *owner, void *args, void *ret)
{
(void) ret;
assert (owner);
assert (args);
int err = -FMC130M_4CH_OK;
SMIO_OWNER_TYPE *self = SMIO_EXP_OWNER(owner);
smio_fmc130m_4ch_t *fmc130m = smio_get_handler (self);
ASSERT_TEST(fmc130m != NULL, "Could not get SMIO FMC130M handler",
err_get_fmc130m_handler, -FMC130M_4CH_ERR);
smch_ad9510_t *smch_ad9510 = SMIO_AD9510_HANDLER(fmc130m);
FMC130M_4CH_CHECK_ACTIVE(self);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch] Calling "
"_fmc130m_4ch_ad9510_cfg_defaults\n");
smch_err_e serr = smch_ad9510_cfg_defaults (smch_ad9510);
ASSERT_TEST(serr == SMCH_SUCCESS, "Could not config AD9510 defaults",
err_smpr_write, -FMC130M_4CH_ERR);
err_smpr_write:
err_get_fmc130m_handler:
return err;
}
/* Macros to avoid repetition of the function body AD9510 */ /* Macros to avoid repetition of the function body AD9510 */
typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param); typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param);
...@@ -504,7 +475,6 @@ typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param) ...@@ -504,7 +475,6 @@ typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param)
#define FMC130M_4CH_AD9510_FUNC_BODY(owner, args, ret, read_func, write_func, \ #define FMC130M_4CH_AD9510_FUNC_BODY(owner, args, ret, read_func, write_func, \
error_msg) \ error_msg) \
do { \ do { \
(void) ret; \
assert (owner); \ assert (owner); \
assert (args); \ assert (args); \
\ \
...@@ -523,9 +493,17 @@ typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param) ...@@ -523,9 +493,17 @@ typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param)
FMC130M_4CH_CHECK_ACTIVE(self); \ FMC130M_4CH_CHECK_ACTIVE(self); \
\ \
smch_err_e serr = SMCH_SUCCESS; \ smch_err_e serr = SMCH_SUCCESS; \
uint32_t value = 0; \
/* Call specific function */ \ /* Call specific function */ \
if (rw) { \ if (rw) { \
WHEN(ISEMPTY(read_func))( \
(void) ret; \
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_exp] " \
"AD9510 read function not implemented\n"); \
err = -FMC130M_4CH_UNINPL; \
return err; \
) \
WHENNOT(ISEMPTY(read_func))( \
uint32_t value = 0; \
serr = ((smch_ad9510_func_fp) read_func) (smch_ad9510, \ serr = ((smch_ad9510_func_fp) read_func) (smch_ad9510, \
&value); \ &value); \
if (serr != SMCH_SUCCESS) { \ if (serr != SMCH_SUCCESS) { \
...@@ -537,8 +515,16 @@ typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param) ...@@ -537,8 +515,16 @@ typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param)
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_exp] " \ DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_exp] " \
"AD9510 function read value = 0x%08X\n", value); \ "AD9510 function read value = 0x%08X\n", value); \
} \ } \
) \
} \ } \
else { \ else { \
WHEN(ISEMPTY(write_func))( \
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc130m_4ch_exp] " \
"AD9510 write function not implemented\n"); \
err = -FMC130M_4CH_UNINPL; \
return err; \
) \
WHENNOT(ISEMPTY(write_func))( \
serr = ((smch_ad9510_func_fp) write_func) (smch_ad9510, \ serr = ((smch_ad9510_func_fp) write_func) (smch_ad9510, \
&param); \ &param); \
if (serr != SMCH_SUCCESS) { \ if (serr != SMCH_SUCCESS) { \
...@@ -547,12 +533,25 @@ typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param) ...@@ -547,12 +533,25 @@ typedef smch_err_e (*smch_ad9510_func_fp) (smch_ad9510_t *self, uint32_t *param)
else { \ else { \
err = -FMC130M_4CH_OK; \ err = -FMC130M_4CH_OK; \
} \ } \
) \
} \ } \
\ \
err_get_fmc130m_handler: \ err_get_fmc130m_handler: \
return err; \ return err; \
} while(0) } while(0)
static smch_err_e smch_ad9510_cfg_defaults_compat (smch_ad9510_t *self, uint32_t *param)
{
(void) param;
return smch_ad9510_cfg_defaults (self);
}
FMC130M_4CH_AD9510_FUNC_NAME_HEADER(cfg_defaults)
{
FMC130M_4CH_AD9510_FUNC_BODY(owner, args, ret, /* No read function */,
smch_ad9510_cfg_defaults_compat, "Could not set/get AD9510 defaults");
}
FMC130M_4CH_AD9510_FUNC_NAME_HEADER(pll_a_div) FMC130M_4CH_AD9510_FUNC_NAME_HEADER(pll_a_div)
{ {
FMC130M_4CH_AD9510_FUNC_BODY(owner, args, ret, smch_ad9510_get_pll_a_div, FMC130M_4CH_AD9510_FUNC_BODY(owner, args, ret, smch_ad9510_get_pll_a_div,
...@@ -660,7 +659,7 @@ FMC130M_4CH_SI571_FUNC_NAME_HEADER(get_defaults) ...@@ -660,7 +659,7 @@ FMC130M_4CH_SI571_FUNC_NAME_HEADER(get_defaults)
/* Exported function pointers */ /* Exported function pointers */
const disp_table_func_fp fmc130m_4ch_exp_fp [] = { const disp_table_func_fp fmc130m_4ch_exp_fp [] = {
_fmc130m_4ch_leds, RW_PARAM_FUNC_NAME(fmc130m_4ch, leds),
RW_PARAM_FUNC_NAME(fmc130m_4ch, si571_oe), RW_PARAM_FUNC_NAME(fmc130m_4ch, si571_oe),
RW_PARAM_FUNC_NAME(fmc130m_4ch, pll_func), RW_PARAM_FUNC_NAME(fmc130m_4ch, pll_func),
RW_PARAM_FUNC_NAME(fmc130m_4ch, pll_status), RW_PARAM_FUNC_NAME(fmc130m_4ch, pll_status),
...@@ -693,7 +692,7 @@ const disp_table_func_fp fmc130m_4ch_exp_fp [] = { ...@@ -693,7 +692,7 @@ const disp_table_func_fp fmc130m_4ch_exp_fp [] = {
RW_PARAM_FUNC_NAME(fmc130m_4ch, trig_dir), RW_PARAM_FUNC_NAME(fmc130m_4ch, trig_dir),
RW_PARAM_FUNC_NAME(fmc130m_4ch, trig_term), RW_PARAM_FUNC_NAME(fmc130m_4ch, trig_term),
RW_PARAM_FUNC_NAME(fmc130m_4ch, trig_val), RW_PARAM_FUNC_NAME(fmc130m_4ch, trig_val),
_fmc130m_4ch_ad9510_cfg_defaults, FMC130M_4CH_AD9510_FUNC_NAME(cfg_defaults),
FMC130M_4CH_AD9510_FUNC_NAME(pll_a_div), FMC130M_4CH_AD9510_FUNC_NAME(pll_a_div),
FMC130M_4CH_AD9510_FUNC_NAME(pll_b_div), FMC130M_4CH_AD9510_FUNC_NAME(pll_b_div),
FMC130M_4CH_AD9510_FUNC_NAME(pll_prescaler), FMC130M_4CH_AD9510_FUNC_NAME(pll_prescaler),
......
...@@ -13,9 +13,10 @@ ...@@ -13,9 +13,10 @@
disp_op_t fmc130m_4ch_leds_exp = { disp_op_t fmc130m_4ch_leds_exp = {
.name = FMC130M_4CH_NAME_LEDS, .name = FMC130M_4CH_NAME_LEDS,
.opcode = FMC130M_4CH_OPCODE_LEDS, .opcode = FMC130M_4CH_OPCODE_LEDS,
.retval = DISP_ARG_END, .retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER, .retval_owner = DISP_OWNER_OTHER,
.args = { .args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t), DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END DISP_ARG_END
} }
...@@ -410,9 +411,11 @@ disp_op_t fmc130m_4ch_trig_val_exp = { ...@@ -410,9 +411,11 @@ disp_op_t fmc130m_4ch_trig_val_exp = {
disp_op_t fmc130m_4ch_ad9510_cfg_defaults_exp = { disp_op_t fmc130m_4ch_ad9510_cfg_defaults_exp = {
.name = FMC130M_4CH_NAME_AD9510_CFG_DEFAULTS, .name = FMC130M_4CH_NAME_AD9510_CFG_DEFAULTS,
.opcode = FMC130M_4CH_OPCODE_AD9510_CFG_DEFAULTS, .opcode = FMC130M_4CH_OPCODE_AD9510_CFG_DEFAULTS,
.retval = DISP_ARG_END, .retval = DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
.retval_owner = DISP_OWNER_OTHER, .retval_owner = DISP_OWNER_OTHER,
.args = { .args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END DISP_ARG_END
} }
}; };
......
...@@ -93,7 +93,7 @@ RW_PARAM_FUNC(swap, wdw_en) { ...@@ -93,7 +93,7 @@ RW_PARAM_FUNC(swap, wdw_en) {
BPM_SWAP_WDW_EN_MIN, BPM_SWAP_WDW_EN_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD); BPM_SWAP_WDW_EN_MIN, BPM_SWAP_WDW_EN_MAX, NO_CHK_FUNC, NO_FMT_FUNC, SET_FIELD);
} }
#define BPM_SWAP_WDW_DLY_MIN 1 #define BPM_SWAP_WDW_DLY_MIN 0
#define BPM_SWAP_WDW_DLY_MAX ((1<<16)-1) #define BPM_SWAP_WDW_DLY_MAX ((1<<16)-1)
RW_PARAM_FUNC(swap, wdw_dly) { RW_PARAM_FUNC(swap, wdw_dly) {
SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, WDW_CTL, DLY, MULT_BIT_PARAM, SET_GET_PARAM(swap, DSP_BPM_SWAP_OFFS, BPM_SWAP, WDW_CTL, DLY, MULT_BIT_PARAM,
......
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