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**BabyWR** is being developed as a cost effective and small pluggable WR node. BabyWR has a [M.2 form-factor](https://en.wikipedia.org/wiki/M.2). BabyWR is designed for low phase noise (10 MHz; -105 dBc/Hz @ 10 Hz) timing generation. For applications that demand ultimate low phase noise, an external high precision oscillator can be disciplined and used as reference clock.
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**BabyWR-Carrier** is a [SPEC](https://ohwr.org/project/spec/wikis/home) like PCIe card ([Figure 2](home#BabyWR-Carrier)) that can accept a BabyWR for test purposes. Like the SPEC, BabyWR-Carrier has a PCIe interface, an SFP+ cage, a (not fully populated) LPC FMC connector, JTAG- and USB-interface, LEDs, button and GPIO headers.
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**BabyWR-Carrier** is a [SPEC](https://ohwr.org/project/spec/wikis/home) like PCIe card ([Figure 2](#babywr-carrier)) that can accept a BabyWR for test purposes. Like the SPEC, BabyWR-Carrier has a PCIe interface, an SFP+ cage, a (not fully populated) LPC FMC connector, JTAG- and USB-interface, LEDs, button and GPIO headers.
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## BabyWR Main Features
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![BabyWR_220701](uploads/551ac21965a005fb57db6c5ca71df1a2/BabyWR_220701.jpg)
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