... | ... | @@ -4,15 +4,7 @@ The original work conducted over FPGAs the AsyncArt project was targeted to Xili |
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- Virtex-4 XC4VFX20: [Xilinx ML405](https://www.xilinx.com/support/documentation/boards_and_kits/ug210.pdf)
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- Spartan-3 XC3S200: [Xilinx Spartan-3 Starter Kit](https://www.xilinx.com/support/documentation/boards_and_kits/ug130.pdf)
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The collection of demo examples from the AsyncArt project was made publicly available in the date of 2012/12/27, and you will need the following FPGA toolchain to open, explore and rebuild them:
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- **Integrated Design Environment:** [Xilinx ISE
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Webpack 14](http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm),
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the industry´s only FREE, fully featured front-to-back FPGA design
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solution for Linux, Windows XP, and Windows 7. ISE WebPACK is the
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ideal downloadable solution for FPGA and CPLD design offering HDL
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synthesis and simulation, implementation, device fitting, and JTAG
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programming.
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The collection of demo examples from the AsyncArt project was reviewed and migrated to **Xilinx 6th Series devices** and made publicly available in the date of **2012/12/27**, so you will need the [Xilinx ISE Webpack 14](http://www.xilinx.com/products/design-tools/ise-design-suite/ise-webpack.htm) Integrated Design Environment.
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The AsyncArt project deriverables are then compressed full Xilinx ISE
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projects, all of them consisting in two fundamental blocks:
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