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examples** that contain useful tricks and methodologies that can be **easily
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extended to more complex projects**.
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The [complete project collection](Reference-Design-Catalog) from the original AsyncArt research project, conducted by Javier Garcia-Lasheras between 2005 and 2007 with the support of the Communication, Signal and Microwaves group of the Public University of Navarre, was implemented over Xilinx devices and was released in 2012 as a collection of schematic projects for a more visually-oriented design.
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The [complete project collection](Reference-Design-Catalog) from the original AsyncArt research project, conducted by **Javier Garcia-Lasheras** between 2005 and 2007 with the support of the **Communication, Signal and Microwaves group of the Public University of Navarre**. The target for this research was to demonstrate the advantages of a full featured System-on-Chip ASIC implemented with the GALS approach. After heavy testing in FPGAs, an ASIC chip dubbed PNX-2006 was successfully built, demonstrating Asynchronous Network-on-Chip capabilities and active power consumption and EM interference reduction techniques in the synchronous blocks.
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Five years later, in 2012, the experimental FPGA projects that served as prototypes for the PNX-2006 ASIC chip were published as free/open source in the Open Hardware Repository. Those designs were implemented over Xilinx devices and are distributed as a collection of schematic projects for **Xilinx ISE**.
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# Learning Resources
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