... | @@ -14,32 +14,22 @@ in custom CMOS IC designs, FPGA technology is key to the AsyncArt |
... | @@ -14,32 +14,22 @@ in custom CMOS IC designs, FPGA technology is key to the AsyncArt |
|
project as an affordable and flexible tool for research & educational
|
|
project as an affordable and flexible tool for research & educational
|
|
use and low-volume commercial production.
|
|
use and low-volume commercial production.
|
|
|
|
|
|
# Prerequisites
|
|
# Learning Resources
|
|
|
|
|
|
\_Asynchronous macro-modules were a Pain to Build but a Joy to Use
|
|
\_Asynchronous macro-modules were a Pain to Build but a Joy to Use
|
|
Wesley A. Clark\_
|
|
Wesley A. Clark\_
|
|
|
|
|
|
Asynchronous logic design may be a very hard subject. In order to fully
|
|
Asynchronous logic design may be a very hard subject. In order to fully
|
|
understand the power of this kind of design and its potential advantages
|
|
understand the power of this kind of design and its potential advantages
|
|
over the traditional synchronous paradigm, relatively strong theoretical
|
|
over the traditional synchronous paradigm, relatively some theoretical
|
|
foundations and practical skills should be previously acquired.
|
|
foundations and practical skills should be previously acquired.
|
|
|
|
|
|
There are plenty of educative material online about asynchronous logic
|
|
## The AsyncArt asynchronous design approach
|
|
design, but there is a little gem than shines over the rest of available
|
|
|
|
books, papers or tutorials. This gem is the book *Principles of
|
|
|
|
asynchronous circuit design - A systems perspective*, published in 2001
|
|
|
|
by [Jens Sparsoe](http://www2.imm.dtu.dk/~jspa/) & [Steve
|
|
|
|
Furber](http://en.wikipedia.org/wikis/Steve_Furber) (more precisely, the
|
|
|
|
chapters 1-8 by Sparsoe, freely available for non-commercial educational
|
|
|
|
use since 2006).
|
|
|
|
|
|
|
|
- [Asynchronous circuit design - A
|
|
|
|
tutorial](http://www2.imm.dtu.dk/pubdb/views/publication_details.php?id=855)
|
|
|
|
|
|
|
|
For those designers used to asynchronous design, the subtle design
|
|
For those designers used to asynchronous design, the subtle design
|
|
tricks & details present in the AsyncArt reference designs will be clear
|
|
tricks & details present in the AsyncArt reference designs will be clear
|
|
enough after reading the next paper (the content is also available in
|
|
enough after reading the next paper (the content is also published in
|
|
the [AsyncArt webpage](http://www.asyncart.com)):
|
|
the [AsyncArt website](http://www.asyncart.com)):
|
|
|
|
|
|
- [Efficient implementation of GALS systems over commercial
|
|
- [Efficient implementation of GALS systems over commercial
|
|
synchronous FPGAs: a new
|
|
synchronous FPGAs: a new
|
... | @@ -49,7 +39,56 @@ Is important to note that the concrete approach introduced in this paper |
... | @@ -49,7 +39,56 @@ Is important to note that the concrete approach introduced in this paper |
|
only covers a limited set of the presented reference designs, but the
|
|
only covers a limited set of the presented reference designs, but the
|
|
core signaling mechanism is shared in one way or another by all of them.
|
|
core signaling mechanism is shared in one way or another by all of them.
|
|
|
|
|
|
# Quick Start
|
|
## AsyncArt blog series
|
|
|
|
|
|
|
|
An AsyncArt Quick-Start has been published as a blog series on [All
|
|
|
|
Programmable Planet](http://www.programmableplanet.com/), an online
|
|
|
|
community sponsored by Xilinx:
|
|
|
|
|
|
|
|
- "Unchaining Ourselves (From the
|
|
|
|
Clock)"http://www.programmableplanet.com/author.asp?section_id=3036\&doc_id=260191&:
|
|
|
|
- In these blogs we will explore the most important asynchronous
|
|
|
|
logic design approaches and tools, and we will discuss where,
|
|
|
|
when, and how to take full advantage of their respective
|
|
|
|
capabilities.
|
|
|
|
|
|
|
|
<!-- end list -->
|
|
|
|
|
|
|
|
- [Asynchronous Design: Grabbing You by the
|
|
|
|
GALS](http://www.programmableplanet.com/author.asp?section_id=3036&doc_id=262874&)
|
|
|
|
- One of the most promising solutions to the issue of connecting
|
|
|
|
multiple IP cores on a single silicon chip is the Globally
|
|
|
|
Asynchronous, Locally Synchronous approach, a.k.a. GALS.
|
|
|
|
|
|
|
|
<!-- end list -->
|
|
|
|
|
|
|
|
- [Entering the
|
|
|
|
Micropipeline](http://www.programmableplanet.com/author.asp?section_id=3036&doc_id=267534&)
|
|
|
|
- We review the main underlying concepts of micropipelines before
|
|
|
|
deploying them in real FPGAs.
|
|
|
|
|
|
|
|
<!-- end list -->
|
|
|
|
|
|
|
|
- [The AsyncArt Project: Asynchronous Open Hardware for
|
|
|
|
FPGAs](http://www.programmableplanet.com/author.asp?section_id=3036&doc_id=267848&)
|
|
|
|
- Here we see a suite of circuits that demonstrate different
|
|
|
|
aspects of asynchronous micropipelines.
|
|
|
|
|
|
|
|
## Further reading
|
|
|
|
|
|
|
|
There are plenty of educative material online about asynchronous logic
|
|
|
|
design, but there is a little gem than shines over the rest of available
|
|
|
|
books, papers or tutorials. This gem is the book *Principles of
|
|
|
|
asynchronous circuit design - A systems perspective*, published in 2001
|
|
|
|
by [Jens Sparsoe](http://www2.imm.dtu.dk/~jspa/) & [Steve
|
|
|
|
Furber](http://en.wikipedia.org/wikis/Steve_Furber) (more precisely, the
|
|
|
|
chapters 1-8 by Sparsoe, freely available for non-commercial educational
|
|
|
|
use since 2006).
|
|
|
|
|
|
|
|
- [Asynchronous circuit design - A
|
|
|
|
tutorial](http://www2.imm.dtu.dk/pubdb/views/publication_details.php?id=855)
|
|
|
|
|
|
|
|
# Demonstrative reference designs
|
|
|
|
|
|
\> Follow this link to access the
|
|
\> Follow this link to access the
|
|
[Reference-Design-Catalog](Reference-Design-Catalog)
|
|
[Reference-Design-Catalog](Reference-Design-Catalog)
|
... | | ... | |