... | @@ -30,7 +30,7 @@ view](https://www.ohwr.org/project/afck/uploads/18f6a5d8108574937aa16898a38c0303 |
... | @@ -30,7 +30,7 @@ view](https://www.ohwr.org/project/afck/uploads/18f6a5d8108574937aa16898a38c0303 |
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<!-- end list -->
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<!-- end list -->
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- **Memory:**
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- **Memory:**
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- 2 GB DDR3 SDRAM (32-bit interface), 800Mhz
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- 2 GB DDR3 SDRAM (32-bit interface), 400Mhz
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- SPI Flash for FPGA configuration
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- SPI Flash for FPGA configuration
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- EEPROM with MAC and unique ID
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- EEPROM with MAC and unique ID
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... | @@ -95,7 +95,8 @@ view](https://www.ohwr.org/project/afck/uploads/18f6a5d8108574937aa16898a38c0303 |
... | @@ -95,7 +95,8 @@ view](https://www.ohwr.org/project/afck/uploads/18f6a5d8108574937aa16898a38c0303 |
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|**Date**|**Event**|
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|**Date**|**Event**|
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|----|----|
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|----|----|
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|01-01-2021|Start working on schematic|
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|01-01-2021|Start working on schematic|
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|xx-09-2021|PCB finished|
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|30-09-2021|PCB finished|
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|03-04-2023|PCB after review |
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... | | ... | |