<br>1 bit per RTM output channel <br> 1 -- line active <br> 0 -- line inactive
<li><b>
HWVERS
</b>[<i>read-only</i>]: Hardware version
<br>PCB version - Hardwired on the board <br> Only meaningful for HW v4 and over <br> Earlier versions show 0 <br> e.g. <br> 0x04 -- hw v4 <br> 0x05 -- hw v5 <br> 0x00 -- hw v3 and earlier
<br>PCB version - Hardwired on the board <br> Only meaningful for HW v4.0 and over <br> Earlier versions show 0. The register <br> uses 4 bits for the version number and<br> 2 bits for the execution.<br> e.g. <br> 0x010001 -- hw v4.1 <br> 0x010111 -- hw v5.3 <br> 0x00-- hw v3 and earlier
Leftmost nibble hex value is major release decimal value \\ Rightmost nibble hex value is minor release decimal value \\ e.g. \\ 0x11 -- v1.1 \\ 0x2e -- v2.14
\end{small}
\item\begin{small}
{\bf
SWITCHES
} [\emph{read-only}]: Status of on-board general-purpose switches
\\
Eg: SW1.1-- SR.SWITCHES[0] \\ SW1.2-- SR.SWITCHES[1] \\ SW2.1-- SR.SWITCHES[4] \\ SW2.4-- SR.SWITCHES[7] \\ 1 -- switch is ON \\ 0 -- switch is OFF
1 bit per RTM output channel \\ 1 -- line active \\ 0 -- line inactive
\end{small}
\item\begin{small}
{\bf
HWVERS
} [\emph{read-only}]: Hardware version
\\
PCB version - Hardwired on the board \\ Only meaningful for HW v4.0 and over \\ Earlier versions show 0. The register \\ uses 4 bits for the version number and\\ 2 bits for the execution.\\ e.g. \\ 0x010001 -- hw v4.1 \\ 0x010111 -- hw v5.3 \\ 0x00-- hw v3 and earlier
\end{small}
\item\begin{small}
{\bf
WRPRES
} [\emph{read-only}]: White Rabbit present
\\
1 -- White Rabbit present \\ 0 -- White Rabbit not present
} [\emph{read/write}]: I2C communication watchdog timeout error
\\
1 -- timeout occured \\ 0 -- no timeout \\ This bit can be cleared by writing a '1' to it
\end{small}
\item\begin{small}
{\bf
I2C\_ERR
} [\emph{read/write}]: I2C communication error
\\
1 -- attempted to address non-existing address \\ 0 -- idle \\ This bit can be cleared by writing a '1' to it
\end{small}
\item\begin{small}
{\bf
FLIM\_PMISSE
} [\emph{read/write}]: Frequency error
\\
1 -- Input above maximum supported frequency \\ 0 -- idle \\ Bit 0 -- channel 1 \\ Bit 1 -- channel 2 \\ etc. \\ Each bit can be cleared by writing a '1' to it
\end{small}
\item\begin{small}
{\bf
FWDG\_PMISSE
} [\emph{read/write}]: Frequency watchdog error
\\
1 -- Pulse over maximum pulse count for given frequency' \\ 0 -- idle \\ Bit 0 -- channel 1 \\ Bit 1 -- channel 2 \\ etc. \\ Each bit can be cleared by writing a '1' to it
} [\emph{read/write}]: Reset bit - active only if RST_UNLOCK is 1
\\
1 -- initiate logic reset \\ 0 -- no reset
\end{small}
\item\begin{small}
{\bf
MPT
} [\emph{write-only}]: Manual Pulse Trigger
\\
Write the following sequence to trigger a pulse: \\ 0xde -- Byte 1 of magic sequence \\ 0xad -- Byte 2 of magic sequence \\ 0xbe -- Byte 3 of magic sequence \\ 0xef -- Byte 4 of magic sequence \\ Number in range 1..6 -- trigger a pulse
