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AMC FMC Carrier AFC
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  • AFC v4.0

Past due
Milestone May 4, 2020–Jul 23, 2020

AFC v4.0

Rationale

AFC v3.1 turned up to be a versatile, cost-effective FMC-HPC carrier. During years since the last release, a number of bugs were revealed and different ideas have raised how to make a design more useful and attract a wide range of users. This release aims to address outstanding issues and make AFC compatible with Sinara hardware ecosystem and ARTIQ control system which opens a way to quantum applications.

Project organization

The main executive of this upgrade is Warsaw University of Technology with @tprzywoz as an electronics designer and @msowinski for project management and consultancy.

Project is divided into several phases:

  1. current project state diagnosis, selection of issues to be applied and parts of the project to be revised,
  2. release of the initial version of schematics to be discussed with the community,
  3. community consultations,
  4. release of the final schematics to be approved by the community,
  5. schematics review,
  6. release of the PCB layout,
  7. layout review,
  8. production of prototypes,
  9. project roundup.

After phase 5 is completed an agreed entity (Creotech?) can start the upgrade of openMMC according to the instructions provided by WUT so that it is ready when prototypes arrive.

All consultations and review processes will take place on OHWR in the form of issues and comments to these.

Schedule and current status

Please be aware that the following schedule may be subject to change!

Action that is currently taking place is emphasised with bold font.

Date Action
4.05.2020 Start of the project.
11.05.2020 Start of phase 1.
27.05.2020 Release of the schematics to be discussed with community and begging of community consultations.
7.06.2020 End of community consultations.
10.06.2020 Release of the final schematics to be approved by community
15.06.2020 Start of design schematics review.
19.06.2020 End of design schematics review.
10.07.2020 Release of the PCB layout.
13.07.2020 Start of design layout review.
17.07.2020 End of design layout review.
20.07.2020 Start of prototype fabrication and project roundup.
23.07.2020 End of project roundup, waiting for prototypes.
TBD Prototypes arrival and testing.
The tabs below will be removed in a future version

Learn more about issue boards, to keep track of issues in multiple lists, using labels, assignees, and milestones. If you’re missing something from issue boards, please create an issue on GitLab’s issue tracker.

  • Issues 98
  • Merge Requests 0
  • Participants 3
  • Labels 7
Unstarted Issues (open and unassigned)
10
  • AFC v4 Prototype Testing Campaign
    #178 afc4v0-testing
  • [Testing] USB / JTAG
    #177 afc4v0-testing
  • [Testing] I2C Subsystem
    #176 afc4v0-testing
  • [Testing] MLVDS
    #175 afc4v0-testing
  • [Testing] RTM Connector
    #174 afc4v0-testing
  • [Testing] Clocking system
    #173 afc4v0-testing
  • [Testing] DDR Memory
    #172 afc4v0-testing
  • [Testing] MGT Links
    #171 afc4v0-testing
  • [Testing] FMC Connectors
    #170 afc4v0-testing
  • [Testing] Power supply
    #169 afc4v0-testing
Ongoing Issues (open and assigned)
0
Completed Issues (closed)
88
  • AFC v4.0 PI verification
    #166 layout
  • Recommended PCB stackup
    #165 layout
  • TCK is pulled up and down
    #163
  • FPGA TMS pullup is unnececary
    #161
  • FMC CLK_DIR - pull-down and usage
    #160 bug
  • Connect PROGRAM_B to I/O extender
    #159 bug
  • Out-of-standard designators
    #158 documentationschematics
  • TCLKs seem to be purposely DC-coupled
    #157 schematics
  • Swapped FMC MGT clocks
    #156 bug
  • Check if U.FL connectors muxed with AMC port 0 by optional mounting are still useful
    #154 schematics
  • Add a pull-down resistor in the ADBUS7 pin (FT4232H-56Q)
    #153 bug
  • Clocks polarity on 8V54816A
    #152 featureschematics
  • Remove connector J3 from CPU
    #151
  • FMC CLK_DIR not connected
    #150 featureschematics
  • Connect FMC I2C pull-up resistors to FMC_3P3VAUX
    #149 bugschematics
  • Move MCP23016 to different I2C interface
    #148 bugschematics
  • Remove non-existent banks of XC7A200T in schematics
    #146
  • VADJ translators
    #145
  • FT4232H USB UART / JTAG Improvements
    #144 bugfeatureschematics
  • Make sure PCIe links are stable in the long term
    #142 bug
  • Suggestions for improving schematics readability
    #141 documentationschematics
  • Check if external WR clock input option is still useful
    #140 schematics
  • Independent control of Si571 oscillators
    #139 featureschematics
  • Improve names of nets connected to RTM connector
    #138 schematics
  • Check if implemented D1.3 RTM pinout is truly compatible with MTCA.4.1
    #137 compatiblity
  • Remove option to route PORT 3 to FPGA I/O pins
    #136 featureschematics
  • FCLK_GTP216_CLK0_P is duplicated and _N signal is missing
    #135 bugschematics
  • Prevent MMC resets when opening terminal for controlling serial ports on Linux
    #134 featureschematics
  • Remove voltage translators for the M-LVDS inputs
    #131 schematics
  • FMC Powergood to FPGA
    #130 featureschematics
  • Enable SPI communication between FMC and FPGA
    #129 featureschematics
  • Change pussh button S1 for shorter version
    #127 featureschematics
  • Support ETM tracing for MMC [CPU.SchDoc]
    #126 featureschematics
  • Fixed clock source pin assignement
    #125 schematics
  • Define basic assembly variants
    #124 schematics
  • Make sure LNLS Timing design will work with AFCv4
    #123 compatiblity
  • Make sure LNLS BPM design will work with AFCv4
    #122 compatiblity
  • Check for EOL components
    #121 schematics
  • Simplify SATA circuit
    #120 feature
  • Verify if PCB thickness complies with AMC standard
    #119 layout
  • Make sure WR will work
    #118 compatiblity
  • Make sure DRTIO will work
    #117 compatiblity
  • Remove MMC access to FPGA flash
    #116
  • Check if additional memory is required for MMC upgrade
    #115
  • Goldpin connectors
    #114
  • WR circuit
    #113 schematics
  • Implement inrush current limit
    #112
  • AFC v4 Upgrade
    #111
  • VCXO 20 MHz (BOOT_CLK_IN) is connected to incompatible FPGA bank
    #110 bug
  • FLASH memory stops responding after some time
    #105 bug
  • Reroute JP1 JTAG connector pins to match vendor defaults
    #104 feature
  • Level Translator TXB0104PWR
    #103 feature
  • Reformat EEPROM access circuit
    #101 feature
  • Change JP1 connector to a shrouded version
    #97 feature
  • Change JP2 connector to a more usual one
    #96 feature
  • Standardize library to generate clean BOM
    #90 featureschematics
  • M-LVDS bus is not transparent to FPGA configuration
    #87 bug
  • Better folder and file structure
    #86 feature
  • Write assembly variant to EEPROM
    #85
  • Battery holder height
    #84 bugcompatiblitylayout
  • modify I2C bus structure
    #53 feature
  • JTAG: missing TVS diode for TDO pin
    #45 bug
  • Clocking scheme redesign
    #43 feature
  • Move current measurement closer to the PSUs
    #42 layout
  • Change either RTM_PS# or EN_I2C_RTM pins on LPC so one can be output while the other is an input
    #40 bug
  • Change MMC from LPC1764 to 1768
    #39 feature
  • Add extra INA220 to 12V rail to check presence of crate power
    #36 feature
  • Change flash memory form M25P to N25Q
    #35 feature
  • Change SCANSTA111 to SCANSTA112
    #34 feature
  • Pullup or latch DCDC enable lines to allow payload to stay on in case of MMC reset
    #30 bug
  • Replace D5 and D6 for a single higher forward current diode
    #29 bug
  • Payload power line stays at ~2.5V when disabled
    #28 bug
  • Add test points for power supplies and ground posts
    #26 feature
  • Use internal XADC reference
    #25 bug
  • AMC #ENABLE signal should reset MMC According to AMC specification
    #24 bug
  • Wrong I2C pullups on IPMB
    #23 bug
  • Disconnect PCIE_CLK1 from one of GTP 216 inputs
    #18 feature
  • Possible conflict on I2C mux
    #17 bug
  • RTM_MP should be connected via a key
    #16 bug
  • Add INA220 monitor to RTM_PWR line
    #15 feature
  • SDRAM ICs MT41K512 are outdated
    #14 bug
  • Fix JTAG signals to comply with uTCA spec.
    #11 bug
  • RTM mechanical key should be connected to SHIELD instead of GND
    #9 bug
  • 1V2 DC/DC wrong compensation value (R44)
    #8 bug
  • components in fmc region3
    #7
  • PLL DAC1/DAC2 SYNC_N are swapped
    #6 bug
  • Remove IC67A (ATMega)
    #4 feature
  • Fix clk20_vcxo routing
    #2 buglayout
89% complete
89%
Start date
May 4, 2020
May 4
-
Jul 23 2020
Due date
Jul 23, 2020 (Past due)
98
Issues 98 New issue
Open: 10 Closed: 88
Time tracking
0
Merge requests 0
Open: 0 Closed: 0 Merged: 0
Reference: project/afc%"AFC v4.0"