Project description
Fmc-adc-iso-400k18b4cha is a 4 channel 400kSps 18 bit ADC low pin count
FPGA Mezzanine Card (VITA 57). The ground reference used for the analog
inputs and the ADC is isolated from the ground reference of the FMC
connector. Digital Isolators included allow the data transmission
between two isolated areas. Voltage Bias between two grounds of up to
1kV can be applied, which is measured with a 100MOhm resistor connected
between two grounds and an additional 10 bit ADC.
Analog input voltage ranges: /-5V,/-10V.
TEMPLATE TEXT BELOW*
The project is divided into four sub-projects:
- Hardware design : Mezzanine board schematic and layout.
- Gateware support : HDL reference designs.
- Software support : Linux device driver, library and tools.
- Testing support : Production and functional tests.
Please refer to the corresponding sub-project for detailed information.
Specifications
Parameter | Value |
---|---|
max. sample rate | 400 kSPS (ADC has 200kSPS, but 2 ADC channels per input are used) |
bits/sample | 18 bit |
channels | 4 |
connectors | 4 x LEMO 00 for signals, 2 x FFC 40P connectors |
input range | +/-5 V |
+/-10 V | |
Resistance between grounds | 100MOhm |
others | 10-bit ADC to measure the isolated voltage, temperature sensor |
FMC to carrier interface | FMC low pin count connector |
Releases
- Hardware: see hardware sub-project releases page.
- Gateware: see gateware sub-project releases page.
- Software: see software sub-project releases page.
Project Information
Contacts
Commercial producers
General question about project
- Oscar Matilla - ALBA Synchrotron
Status
Date | Event |
---|---|
22-01-2014 | Start working on project |
23-09-2014 | First production of the board. |
13-10-2015 | First public realize. |
Xavier Serra - 13 October 2015