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A simple VME64x carrier for two low pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Commercially available. More info at the Wiki page
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White Rabbit is a fully deterministic Ethernet-based network for general purpose data transfer and synchronization. It can synchronize over 1000 nodes with sub-ns accuracy over fiber lengths of up to 10 km. Commercially available. More info at the Wiki page
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A VME card that is used to recover RF, bunch and revolution clocks over a white rabbit network.
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SAMD21-based monitoring module for DI/OT power supply and fan tray.
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DI/OT Kintex Ultrascale-based Peripheral Board with HPC FMC and SODIMM DDR4 slot. More info at the Wiki page
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Projects / FMC High-Voltage supply - fmc-hv-2ch
GNU Lesser General Public License v2.1 onlyFMC LPC card with two High Voltage (HV) outputs and one Low Voltage (5-10V) output. Has mV voltage sensing and mA current sensing capabilities. More info at the Wiki page
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Projects / powerlink
BSD 3-Clause "New" or "Revised" LicensePowerlink Industrial Ethernet stack. It runs on top of the Hydra rad-tol SoC project. More info at the Wiki page
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Introductory SoC course with reference designs based on the Xilinx Vitis Unified Software Development Platform and targeted to the Xilinx Zynq UltraScale+ MPSoC. More info at the Wiki page
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High-resolution frequency/phase-microstepper for timing laboratories. More info at the Wiki page
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High precision, ultra stable Oven Controlled Crystal Oscillator (OCXO) suitable for the Metrology purposes in a 19" format. Can be used to upgrade the performance of the SPEC7.
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Zynq CarrIer for Timing sYstems based on radiofrequency over White Rabbit, aka CITY.
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Radiation-tolerant AC/DC power supply unit (PSU). In: 230VAC, 50Hz, Out: +12V, 8.33A (100W) and +5V, 2A (10W). Possibility for redundancy. The design is CompactPCI compatible. Part of DIOT project.
Topics: ratopusUpdated -
Projects / AIDA-2020 TLU - Software
GNU Affero General Public License v3.0Updated -
Projects / AIDA-2020 TLU - Hardware
CERN Open Hardware Licence v1.2Updated -
Projects / AIDA-2020 TLU - Gateware
GNU General Public License v3.0 or laterFPGA Firmware ( "Gateware" ) for AIDA-2020 TLU and AIDA mini-TLU
Uses "IPBus Build" ( ipbb )
Build instructions at Instructions here
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A White Rabbit Timing Receiver in AMC (Advanced Mezzanine Card, AdvancedMC) format. More info at the Wiki page
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The uRV (Micro RISC-V) core is a small-sized implementation of a 32-bit RISC-V core, targeted specifically at FPGAs. More info at the Wiki page
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A White Rabbit Timing Receiver in PMC (PCI Mezzanine Card) format. More info at the Wiki page
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OpenBreath / Open Breath PEP Whistle
CERN Open Hardware Licence Version 2 - Strongly ReciprocalUpdated -
FMC-PROFINET is a PROFINET device (“slave”) card based on the Siemens ERTEC200 chip in the FMC-LPC form-factor.
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