Commits · 1f3c0302624726b6519c14deb6cda555d83b3800 · Projects / White Rabbit core collection · Open Hardware Repository

15 Sep, 2020 35 commits
- wrc_core: increase AUX address space to 32 kB in SDB descriptor · 1f3c0302
  Tomasz Wlostowski authored Jun 19, 2019
  
  1f3c0302
- dmtd_sampler: initialize clock divider flip-flop, added to Manifest · 618d4f6d
  Tomasz Wlostowski authored Jun 19, 2019
  
  618d4f6d
- wr_gtx_phy_kintex7_lp: wip · 41b25aba
  Tomasz Wlostowski authored Jun 14, 2019
  
  41b25aba
- wr_gtx_phy_kintex7_lp: gave up with RX oversampling... · 4b0e3748
  Tomasz Wlostowski authored Jun 13, 2019
  
  4b0e3748
- kintex7-lp: WIP on oversampled version, not sure if it will be needed with the QPLL · 5c6e5607
  Tomasz Wlostowski authored Jun 12, 2019
  
  5c6e5607
- kintex7_lp: hacking oversampled version of the transceiver · 18ba0078
  Tomasz Wlostowski authored Jun 06, 2019
  
  18ba0078
- wr_softpll_ng: Enabled internal frequency reference for oscillator diagnostics · 28502290
  Tomasz Wlostowski authored Feb 14, 2018
  
  28502290
- wr_gtx_phy_kintex7_lp: removed some unused signals · 33a90903
  Tomasz Wlostowski authored May 25, 2019
  
  33a90903
- wr_core: expose SoftPLL's g_use_sampled_ref_clocks generic & associated interface · fcc50b04
  Tomasz Wlostowski authored May 25, 2019
  
  fcc50b04
- wr_softpll_ng: added support for external DDMTD sampler · 5363943e
  Tomasz Wlostowski authored Jul 07, 2017
  
  5363943e
- platform: phase-stable GTXE2 wrapper (Kintex7), initial version · 4e9d0763
  Tomasz Wlostowski authored Mar 29, 2019
  
  4e9d0763
- platform: hacking the GTXE2 wrapper · 678491f4
  Tomasz Wlostowski authored Feb 26, 2019
  
  678491f4
- wr_core: extend aux address space to 32kB · 68f13e0b
  Tomasz Wlostowski authored Jan 28, 2019
  
  68f13e0b
- sim/8b10b_encoder: fix logic signal aliasing with a port · 1a90b670
  Tomasz Wlostowski authored Mar 11, 2020
  
  1a90b670
- platform/xilinx: include Xilinx's GTHE4 IP in Manifest · 85b2022c
  Tomasz Wlostowski authored Aug 06, 2020
  
  85b2022c
- wr_si57x_interface: latch the current RFREQ value before writing it to the… · b27d95fb
  Tomasz Wlostowski authored Jul 28, 2020
```
wr_si57x_interface: latch the current RFREQ value before writing it to the device (prevents changes of the RFREQ while I2C is still busy)
```
  b27d95fb
- wr_gtp_phy: add Xilinx IP-based GTHE4 wrapper · 0c034ee6
  Tomasz Wlostowski authored Jul 28, 2020
  
  0c034ee6
- wr_gtp_phy: generate 2-cycle long RXSLIDE pulses for Ultrascale(+) family · 8a4c3198
  Tomasz Wlostowski authored Jul 28, 2020
  
  8a4c3198
- wr_gthe4_phy_family7: verified wrapper based on Xilinx IP · 76bd85c4
  Tomasz Wlostowski authored Jul 28, 2020
  
  76bd85c4
- wr_gthe4_phyh_family7: last attempt to fix bitslide jumps before reverting to Xilinx's IP wrapper · 24a70af3
  Tomasz Wlostowski authored Jul 28, 2020
  
  24a70af3
- wr_gthe4_phy_family7: fix RX CDR lock & clocking for AFCZ · 6936b1f3
  Tomasz Wlostowski authored Jun 26, 2020
  
  6936b1f3
- wr_si57x_interface: made it working with SoftPLL on AFCZ. · dc6b579a
  Tomasz Wlostowski authored Mar 20, 2020
  
  dc6b579a
- platform/xilinx: wrapper for Zynq Ulrascale+ GTHE4 transceiver · 1d31cc8a
  Tomasz Wlostowski authored Dec 06, 2019
  
  1d31cc8a
- sim: fix whitespace error · 309ee8e6
  Tomasz Wlostowski authored Jan 31, 2020
  
  309ee8e6
- xilinx: enable bitslide logic in wr_gthe3_phy_family7 (Kintex Ultrascale) · c56c1860
  Tomasz Wlostowski authored Dec 13, 2018
  
  c56c1860
- wr_board_pkg: declare eb_ethernet_slave as a component so that compiler doesn't… · 64d43bbf
  Tomasz Wlostowski authored Dec 13, 2018
```
wr_board_pkg: declare eb_ethernet_slave as a component so that compiler doesn't complain when EB repo is not included
```
  64d43bbf
- wr_1000basex_phy_model: fix in loopen_i pin handling · 8cf41533
  Tomasz Wlostowski authored Nov 11, 2018
  
  8cf41533
- sim: trivial model of a 1000BaseX serdes · 4828def4
  Tomasz Wlostowski authored Nov 10, 2018
  
  4828def4
- GTHE3 wrapper: added missing gc_reset_synchronizer sources · e1446cba
  Tomasz Wlostowski authored Oct 30, 2018
  
  e1446cba
- hdl: GTHE3 wrapper wip · 6b561411
  Tomasz Wlostowski authored Oct 30, 2018
  
  6b561411
- platform: GTHE3 PHY wrapper, non-functioning initial version · 1b1cd2f6
  Tomasz Wlostowski authored Oct 22, 2018
  
  1b1cd2f6
- platform/xilinx/wr_gth_phy: first version of Ultrascale GTH transceiver wrapper · fe7c5683
  Tomasz Wlostowski authored Sep 06, 2017
  
  fe7c5683
- one more fix to general-cores for Quartus · e306a6b0
  Grzegorz Daniluk authored Sep 15, 2020
  
  e306a6b0
- testbench CI: keep only WRPC simulations for now · f9bb3e9e
  Grzegorz Daniluk authored Sep 15, 2020
  
  f9bb3e9e
- update general-cores to the (fixed) greg-proposed_master · 5885690f
  Grzegorz Daniluk authored Sep 15, 2020
  
  5885690f
14 Sep, 2020 3 commits
- update general-cores to the version used for last BTrain release · 957fb811
  Grzegorz Daniluk authored Sep 14, 2020
  
  957fb811
- update Continuous Integration to synthesize for SPEC, SVEC, VFC-HD · d84673de
  Grzegorz Daniluk authored Sep 14, 2020
  
  d84673de
- vfchd: update synthesis Manifest for new hdlmake · 9eb0a9a2
  Grzegorz Daniluk authored Sep 09, 2020
  
  9eb0a9a2
13 May, 2020 1 commit
- board/s[v,p]ec: added DMTD clock output · a72a4223
  Tomasz Wlostowski authored Oct 14, 2019
  
  a72a4223
29 Apr, 2020 1 commit
- [BIN] update binary to btrain-v1.2 · be42d527
  Maciej Lipinski authored Apr 25, 2020
  
  be42d527