utc_core_regs

UTC core registers

Wishbone slave for registers related to UTC core

Contents:

1. Memory map summary
2. HDL symbol
3. Register description
3.1. UTC seconds register
3.2. UTC coarse time register, system clock ticks (125MHz)
3.3. Trigger time-tag metadata register
3.4. Trigger time-tag UTC seconds register
3.5. Trigger time-tag coarse time (system clock ticks 125MHz) register
3.6. Trigger time-tag fine time register, always 0 (used for time-tag format compatibility)
3.7. Acquisition start time-tag metadata register
3.8. Acquisition start time-tag UTC seconds register
3.9. Acquisition start time-tag coarse time (system clock ticks 125MHz) register
3.10. Acquisition start time-tag fine time register, always 0 (used for time-tag format compatibility)
3.11. Acquisition stop time-tag metadata register
3.12. Acquisition stop time-tag UTC seconds register
3.13. Acquisition stop time-tag coarse time (system clock ticks 125MHz) register
3.14. Acquisition stop time-tag fine time register, always 0 (used for time-tag format compatibility)
3.15. Acquisition end time-tag metadata register
3.16. Acquisition end time-tag UTC seconds register
3.17. Acquisition end time-tag coarse time (system clock ticks 125MHz) register
3.18. Acquisition end time-tag fine time register, always 0 (used for time-tag format compatibility)

1. Memory map summary

H/W Address Type Name VHDL/Verilog prefix C prefix
0x0 REG UTC seconds register utc_core_seconds SECONDS
0x1 REG UTC coarse time register, system clock ticks (125MHz) utc_core_coarse COARSE
0x2 REG Trigger time-tag metadata register utc_core_trig_tag_meta TRIG_TAG_META
0x3 REG Trigger time-tag UTC seconds register utc_core_trig_tag_seconds TRIG_TAG_SECONDS
0x4 REG Trigger time-tag coarse time (system clock ticks 125MHz) register utc_core_trig_tag_coarse TRIG_TAG_COARSE
0x5 REG Trigger time-tag fine time register, always 0 (used for time-tag format compatibility) utc_core_trig_tag_fine TRIG_TAG_FINE
0x6 REG Acquisition start time-tag metadata register utc_core_acq_start_tag_meta ACQ_START_TAG_META
0x7 REG Acquisition start time-tag UTC seconds register utc_core_acq_start_tag_seconds ACQ_START_TAG_SECONDS
0x8 REG Acquisition start time-tag coarse time (system clock ticks 125MHz) register utc_core_acq_start_tag_coarse ACQ_START_TAG_COARSE
0x9 REG Acquisition start time-tag fine time register, always 0 (used for time-tag format compatibility) utc_core_acq_start_tag_fine ACQ_START_TAG_FINE
0xa REG Acquisition stop time-tag metadata register utc_core_acq_stop_tag_meta ACQ_STOP_TAG_META
0xb REG Acquisition stop time-tag UTC seconds register utc_core_acq_stop_tag_seconds ACQ_STOP_TAG_SECONDS
0xc REG Acquisition stop time-tag coarse time (system clock ticks 125MHz) register utc_core_acq_stop_tag_coarse ACQ_STOP_TAG_COARSE
0xd REG Acquisition stop time-tag fine time register, always 0 (used for time-tag format compatibility) utc_core_acq_stop_tag_fine ACQ_STOP_TAG_FINE
0xe REG Acquisition end time-tag metadata register utc_core_acq_end_tag_meta ACQ_END_TAG_META
0xf REG Acquisition end time-tag UTC seconds register utc_core_acq_end_tag_seconds ACQ_END_TAG_SECONDS
0x10 REG Acquisition end time-tag coarse time (system clock ticks 125MHz) register utc_core_acq_end_tag_coarse ACQ_END_TAG_COARSE
0x11 REG Acquisition end time-tag fine time register, always 0 (used for time-tag format compatibility) utc_core_acq_end_tag_fine ACQ_END_TAG_FINE

2. HDL symbol

rst_n_i UTC seconds register:
wb_clk_i utc_core_seconds_o[31:0]
wb_addr_i[4:0] utc_core_seconds_i[31:0]
wb_data_i[31:0] utc_core_seconds_load_o
wb_data_o[31:0]  
wb_cyc_i UTC coarse time register, system clock ticks (125MHz):
wb_sel_i[3:0] utc_core_coarse_o[31:0]
wb_stb_i utc_core_coarse_i[31:0]
wb_we_i utc_core_coarse_load_o
wb_ack_o  
Trigger time-tag metadata register:
utc_core_trig_tag_meta_i[31:0]
 
Trigger time-tag UTC seconds register:
utc_core_trig_tag_seconds_i[31:0]
 
Trigger time-tag coarse time (system clock ticks 125MHz) register:
utc_core_trig_tag_coarse_i[31:0]
 
Trigger time-tag fine time register, always 0 (used for time-tag format compatibility):
utc_core_trig_tag_fine_i[31:0]
 
Acquisition start time-tag metadata register:
utc_core_acq_start_tag_meta_i[31:0]
 
Acquisition start time-tag UTC seconds register:
utc_core_acq_start_tag_seconds_i[31:0]
 
Acquisition start time-tag coarse time (system clock ticks 125MHz) register:
utc_core_acq_start_tag_coarse_i[31:0]
 
Acquisition start time-tag fine time register, always 0 (used for time-tag format compatibility):
utc_core_acq_start_tag_fine_i[31:0]
 
Acquisition stop time-tag metadata register:
utc_core_acq_stop_tag_meta_i[31:0]
 
Acquisition stop time-tag UTC seconds register:
utc_core_acq_stop_tag_seconds_i[31:0]
 
Acquisition stop time-tag coarse time (system clock ticks 125MHz) register:
utc_core_acq_stop_tag_coarse_i[31:0]
 
Acquisition stop time-tag fine time register, always 0 (used for time-tag format compatibility):
utc_core_acq_stop_tag_fine_i[31:0]
 
Acquisition end time-tag metadata register:
utc_core_acq_end_tag_meta_i[31:0]
 
Acquisition end time-tag UTC seconds register:
utc_core_acq_end_tag_seconds_i[31:0]
 
Acquisition end time-tag coarse time (system clock ticks 125MHz) register:
utc_core_acq_end_tag_coarse_i[31:0]
 
Acquisition end time-tag fine time register, always 0 (used for time-tag format compatibility):
utc_core_acq_end_tag_fine_i[31:0]

3. Register description

3.1. UTC seconds register

HW prefix: utc_core_seconds
HW address: 0x0
C prefix: SECONDS
C offset: 0x0

UTC seconds counter. Incremented everytime the UTC coarse counter overflows.

31 30 29 28 27 26 25 24
SECONDS[31:24]
23 22 21 20 19 18 17 16
SECONDS[23:16]
15 14 13 12 11 10 9 8
SECONDS[15:8]
7 6 5 4 3 2 1 0
SECONDS[7:0]

3.2. UTC coarse time register, system clock ticks (125MHz)

HW prefix: utc_core_coarse
HW address: 0x1
C prefix: COARSE
C offset: 0x4

UTC coarse time counter clocked by 125MHz system clock.
Counts from 0 to 125000000.

31 30 29 28 27 26 25 24
COARSE[31:24]
23 22 21 20 19 18 17 16
COARSE[23:16]
15 14 13 12 11 10 9 8
COARSE[15:8]
7 6 5 4 3 2 1 0
COARSE[7:0]

3.3. Trigger time-tag metadata register

HW prefix: utc_core_trig_tag_meta
HW address: 0x2
C prefix: TRIG_TAG_META
C offset: 0x8
31 30 29 28 27 26 25 24
TRIG_TAG_META[31:24]
23 22 21 20 19 18 17 16
TRIG_TAG_META[23:16]
15 14 13 12 11 10 9 8
TRIG_TAG_META[15:8]
7 6 5 4 3 2 1 0
TRIG_TAG_META[7:0]

3.4. Trigger time-tag UTC seconds register

HW prefix: utc_core_trig_tag_seconds
HW address: 0x3
C prefix: TRIG_TAG_SECONDS
C offset: 0xc
31 30 29 28 27 26 25 24
TRIG_TAG_SECONDS[31:24]
23 22 21 20 19 18 17 16
TRIG_TAG_SECONDS[23:16]
15 14 13 12 11 10 9 8
TRIG_TAG_SECONDS[15:8]
7 6 5 4 3 2 1 0
TRIG_TAG_SECONDS[7:0]

3.5. Trigger time-tag coarse time (system clock ticks 125MHz) register

HW prefix: utc_core_trig_tag_coarse
HW address: 0x4
C prefix: TRIG_TAG_COARSE
C offset: 0x10
31 30 29 28 27 26 25 24
TRIG_TAG_COARSE[31:24]
23 22 21 20 19 18 17 16
TRIG_TAG_COARSE[23:16]
15 14 13 12 11 10 9 8
TRIG_TAG_COARSE[15:8]
7 6 5 4 3 2 1 0
TRIG_TAG_COARSE[7:0]

3.6. Trigger time-tag fine time register, always 0 (used for time-tag format compatibility)

HW prefix: utc_core_trig_tag_fine
HW address: 0x5
C prefix: TRIG_TAG_FINE
C offset: 0x14
31 30 29 28 27 26 25 24
TRIG_TAG_FINE[31:24]
23 22 21 20 19 18 17 16
TRIG_TAG_FINE[23:16]
15 14 13 12 11 10 9 8
TRIG_TAG_FINE[15:8]
7 6 5 4 3 2 1 0
TRIG_TAG_FINE[7:0]

3.7. Acquisition start time-tag metadata register

HW prefix: utc_core_acq_start_tag_meta
HW address: 0x6
C prefix: ACQ_START_TAG_META
C offset: 0x18
31 30 29 28 27 26 25 24
ACQ_START_TAG_META[31:24]
23 22 21 20 19 18 17 16
ACQ_START_TAG_META[23:16]
15 14 13 12 11 10 9 8
ACQ_START_TAG_META[15:8]
7 6 5 4 3 2 1 0
ACQ_START_TAG_META[7:0]

3.8. Acquisition start time-tag UTC seconds register

HW prefix: utc_core_acq_start_tag_seconds
HW address: 0x7
C prefix: ACQ_START_TAG_SECONDS
C offset: 0x1c
31 30 29 28 27 26 25 24
ACQ_START_TAG_SECONDS[31:24]
23 22 21 20 19 18 17 16
ACQ_START_TAG_SECONDS[23:16]
15 14 13 12 11 10 9 8
ACQ_START_TAG_SECONDS[15:8]
7 6 5 4 3 2 1 0
ACQ_START_TAG_SECONDS[7:0]

3.9. Acquisition start time-tag coarse time (system clock ticks 125MHz) register

HW prefix: utc_core_acq_start_tag_coarse
HW address: 0x8
C prefix: ACQ_START_TAG_COARSE
C offset: 0x20
31 30 29 28 27 26 25 24
ACQ_START_TAG_COARSE[31:24]
23 22 21 20 19 18 17 16
ACQ_START_TAG_COARSE[23:16]
15 14 13 12 11 10 9 8
ACQ_START_TAG_COARSE[15:8]
7 6 5 4 3 2 1 0
ACQ_START_TAG_COARSE[7:0]

3.10. Acquisition start time-tag fine time register, always 0 (used for time-tag format compatibility)

HW prefix: utc_core_acq_start_tag_fine
HW address: 0x9
C prefix: ACQ_START_TAG_FINE
C offset: 0x24
31 30 29 28 27 26 25 24
ACQ_START_TAG_FINE[31:24]
23 22 21 20 19 18 17 16
ACQ_START_TAG_FINE[23:16]
15 14 13 12 11 10 9 8
ACQ_START_TAG_FINE[15:8]
7 6 5 4 3 2 1 0
ACQ_START_TAG_FINE[7:0]

3.11. Acquisition stop time-tag metadata register

HW prefix: utc_core_acq_stop_tag_meta
HW address: 0xa
C prefix: ACQ_STOP_TAG_META
C offset: 0x28
31 30 29 28 27 26 25 24
ACQ_STOP_TAG_META[31:24]
23 22 21 20 19 18 17 16
ACQ_STOP_TAG_META[23:16]
15 14 13 12 11 10 9 8
ACQ_STOP_TAG_META[15:8]
7 6 5 4 3 2 1 0
ACQ_STOP_TAG_META[7:0]

3.12. Acquisition stop time-tag UTC seconds register

HW prefix: utc_core_acq_stop_tag_seconds
HW address: 0xb
C prefix: ACQ_STOP_TAG_SECONDS
C offset: 0x2c
31 30 29 28 27 26 25 24
ACQ_STOP_TAG_SECONDS[31:24]
23 22 21 20 19 18 17 16
ACQ_STOP_TAG_SECONDS[23:16]
15 14 13 12 11 10 9 8
ACQ_STOP_TAG_SECONDS[15:8]
7 6 5 4 3 2 1 0
ACQ_STOP_TAG_SECONDS[7:0]

3.13. Acquisition stop time-tag coarse time (system clock ticks 125MHz) register

HW prefix: utc_core_acq_stop_tag_coarse
HW address: 0xc
C prefix: ACQ_STOP_TAG_COARSE
C offset: 0x30
31 30 29 28 27 26 25 24
ACQ_STOP_TAG_COARSE[31:24]
23 22 21 20 19 18 17 16
ACQ_STOP_TAG_COARSE[23:16]
15 14 13 12 11 10 9 8
ACQ_STOP_TAG_COARSE[15:8]
7 6 5 4 3 2 1 0
ACQ_STOP_TAG_COARSE[7:0]

3.14. Acquisition stop time-tag fine time register, always 0 (used for time-tag format compatibility)

HW prefix: utc_core_acq_stop_tag_fine
HW address: 0xd
C prefix: ACQ_STOP_TAG_FINE
C offset: 0x34
31 30 29 28 27 26 25 24
ACQ_STOP_TAG_FINE[31:24]
23 22 21 20 19 18 17 16
ACQ_STOP_TAG_FINE[23:16]
15 14 13 12 11 10 9 8
ACQ_STOP_TAG_FINE[15:8]
7 6 5 4 3 2 1 0
ACQ_STOP_TAG_FINE[7:0]

3.15. Acquisition end time-tag metadata register

HW prefix: utc_core_acq_end_tag_meta
HW address: 0xe
C prefix: ACQ_END_TAG_META
C offset: 0x38
31 30 29 28 27 26 25 24
ACQ_END_TAG_META[31:24]
23 22 21 20 19 18 17 16
ACQ_END_TAG_META[23:16]
15 14 13 12 11 10 9 8
ACQ_END_TAG_META[15:8]
7 6 5 4 3 2 1 0
ACQ_END_TAG_META[7:0]

3.16. Acquisition end time-tag UTC seconds register

HW prefix: utc_core_acq_end_tag_seconds
HW address: 0xf
C prefix: ACQ_END_TAG_SECONDS
C offset: 0x3c
31 30 29 28 27 26 25 24
ACQ_END_TAG_SECONDS[31:24]
23 22 21 20 19 18 17 16
ACQ_END_TAG_SECONDS[23:16]
15 14 13 12 11 10 9 8
ACQ_END_TAG_SECONDS[15:8]
7 6 5 4 3 2 1 0
ACQ_END_TAG_SECONDS[7:0]

3.17. Acquisition end time-tag coarse time (system clock ticks 125MHz) register

HW prefix: utc_core_acq_end_tag_coarse
HW address: 0x10
C prefix: ACQ_END_TAG_COARSE
C offset: 0x40
31 30 29 28 27 26 25 24
ACQ_END_TAG_COARSE[31:24]
23 22 21 20 19 18 17 16
ACQ_END_TAG_COARSE[23:16]
15 14 13 12 11 10 9 8
ACQ_END_TAG_COARSE[15:8]
7 6 5 4 3 2 1 0
ACQ_END_TAG_COARSE[7:0]

3.18. Acquisition end time-tag fine time register, always 0 (used for time-tag format compatibility)

HW prefix: utc_core_acq_end_tag_fine
HW address: 0x11
C prefix: ACQ_END_TAG_FINE
C offset: 0x44
31 30 29 28 27 26 25 24
ACQ_END_TAG_FINE[31:24]
23 22 21 20 19 18 17 16
ACQ_END_TAG_FINE[23:16]
15 14 13 12 11 10 9 8
ACQ_END_TAG_FINE[15:8]
7 6 5 4 3 2 1 0
ACQ_END_TAG_FINE[7:0]