Open
Milestone
EDA-04677-V2-0
prototype v3 for us is v2 in EDMS: EDA-04677-V2-0
All issues for this milestone are closed. You may close this milestone now.
Unstarted Issues (open and unassigned)
0
Ongoing Issues (open and assigned)
0
Completed Issues (closed)
11
- LMZ31704RVQT inhibit signal
- Add ferrite on the power supply lines for better EMC protection
- IC27 missing on the boards
- Unclear what is driving P5VREG
- Align HW channel order with front panel
- Move electronic components from the bottom of the baord
- Front Panel - too small opening for the fiber connector
- Front panel - missing trigger hole
- IC1 wrongly listed not_mounted in BOM
- add dc blocking cap on TIA's negative output
- power1: P3V3_PG connected to PG_A instead of PG_D