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D
DDR3 controller for Spartan6
Commit edfed0ea authored by Tristan Gingold's avatar Tristan Gingold
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ddr3_ctrl_wb: remove unused signal.

parent 81eb9449
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hdl/rtl/ddr3_ctrl_wb.vhd
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......@@ -155,7 +155,6 @@ architecture rtl of ddr3_ctrl_wb is
signal ddr_burst_cnt : unsigned(5 downto 0);
signal ddr_cmd_en : std_logic;
signal ddr_cmd_en_d : std_logic;
signal ddr_cmd_instr : std_logic_vector(2 downto 0);
signal ddr_cmd_bl : std_logic_vector(5 downto 0);
signal ddr_cmd_byte_addr : std_logic_vector(g_BYTE_ADDR_WIDTH - 1 downto 0);
......@@ -242,9 +241,7 @@ begin
if rising_edge(wb_clk_i) then
if (rst_n_i = '0') then
ddr_cmd_en <= '0';
ddr_cmd_en_d <= '0';
else
ddr_cmd_en_d <= ddr_cmd_en;
if (((ddr_burst_cnt = c_DDR_BURST_LENGTH) or
(wb_cyc_f_edge = '1' and wb_we_d = '1') or
(wb_stb_f_edge = '1' and wb_we_d = '0')) and ddr_cmd_full_i = '0') then
......
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