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Tool for generating multi-purpose makefiles for FPGA projects.

Main features:

makefile generation for: fetching modules from repositories simulating HDL projects synthesizing HDL projects synthesizing projects remotely (keeping your local resources free) generating multi-vendor project files (no clicking in the IDE!) many other things without involving make and makefiles

Hdlmake supports modularity, scalability, revision control systems. Hdlmake can be run on any Linux or Windows machine with any HDL More info at the Wiki page

Development of software for the White Rabbit switch, and in particular the embedded Linux system running in the ARM9 processor. More info at the Wiki page

This project covers the hardware development of version 4 of the White Rabbit switch (WRS-v4). More info at the Wiki page

White Rabbit PTP Core software for LatticeMico32. It consists of a software wrapper for running a PTP daemon without an operating system and device drivers for WRPC HDL internals.

The uRV (Micro RISC-V) core is a small-sized implementation of a 32-bit RISC-V core, targeted specifically at FPGAs. More info at the Wiki page

DI/OT Zynq Ultrascale-based System Board with White Rabbit support. More info at the Wiki page

A Precise Time Protocol (PTP, IEEE 1588) software stack whose single source code can be compiled for many architectures (POSIX systems, WR switch, WR node, ...) and which is easily extensible.

This project contains all the HDL gateware necessary for the FPGA of the WR switch.

A collection of cores needed in the White Rabbit node and switch. Includes White Rabbit PTP Core (WRPC).

A simple 4-lane PCIe carrier for a low pin count FPGA Mezzanine Card (VITA 57). It supports the White Rabbit timing and control network. Commercially available. Linux and Labview drivers available for some mezzanine cards. More info at the Wiki page

BabyWR is a general purpose small pluggable WR node in a M.2 form-factor. More info at the Wiki page

White Rabbit is a fully deterministic Ethernet-based network for general purpose data transfer and synchronization. It can synchronize over 1000 nodes with sub-ns accuracy over fiber lengths of up to 10 km. Commercially available. More info at the Wiki page

The Macbeth (MAChine / BEamline Timing Hardware) system is aimed to synchronize the beamlines experimental devices (pump-probe, laser, …) with the accelerator beam with a high accuracy

Hardware and software (libraries and GUI) to implement the SFF-8472 standard “Diagnostic Monitoring Interface for Optical Transceivers”. The hardware implements four SFP+s that can be exercised in parallel. To access the I2C interfaces a USB to I2C chip is used. More info at the Wiki page

SAMD21-based monitoring module for DI/OT power supply and fan tray.

Distributed I/O Tier - these are electronics modules installed close to a particle accelerator in radiation-exposed or radiation-free areas controlled by the master in the Front-end tier over the fieldbus. These are usually FPGA-based boards sampling digital and analog inputs, driving outputs and performing various safety critical operations. More info at the Wiki page

DIOT 3U crate mechanics and backplane compliant with CompactPCI-Serial standard.

The PandABox II Project is a collaboration between ALBA, DESY, DIAMOND, MAXIV, and SOLEIL, to enhance the existing “Position and Acquisition” processing platform called PandABox II. It will provide a New processor Zynq Ultrascale, more configurable I/O, more SFP, and supporting multiple encoder standards (incremental, SSI, BISS...). It will deliver synchronous triggering and data capture capabilities.

Radiation-tolerant AC/DC power supply unit (PSU). In: 230VAC, 50Hz, Out: +12V, 8.33A (100W) and +5V, 2A (10W). Possibility for redundancy. The design is CompactPCI compatible. Part of DIOT project.