#!/bin/sh
export MODELSIM_ROOT="/software/CAD/Mentor/2013_2014/Questa/HDS_2012.2b/questasim/"
export ISE_VHDL_MTI="/software/CAD/Xilinx/14.7_64b/14.7/ISE_DS/ISE/vhdl/questasim/10.2c_5/lin64/"
export ISE_VLOG_MTI="/software/CAD/Xilinx/14.7_64b/14.7/ISE_DS/ISE/verilog/questasim/10.2c_5/lin64/"

vsim -c -do $REPOS_FW_DIR/ipbus/firmware/sim/scripts/setup_project.tcl
cp -r $REPOS_FW_DIR/ipbus/firmware/ethernet/sim/modelsim_fli ./
cd modelsim_fli
./mac_fli_compile.sh
cd ..
ln -s modelsim_fli/mac_fli.so

