wr_nic: unify nic-hardware.h (sw)

eb47aff1 · Adam Wujek · Alessandro Rubini · 6cc31cc4 · eb47aff1 · eb47aff1
Commit eb47aff1 authored Oct 28, 2014 by Adam Wujek 💬 Committed by Alessandro Rubini Dec 04, 2014
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nic-hardware.h kernel/wr_nic/nic-hardware.h +71 -2

wrsDate.c userspace/snmpd/wrsDate.c +4 -0

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--- a/kernel/wr_nic/nic-hardware.h
+++ b/kernel/wr_nic/nic-hardware.h
 /*
 * hardware-specific definitions for the White Rabbit NIC
 *
- * Copyright (C) 2010 CERN (www.cern.ch)
+ * Copyright (C) 2010-2014 CERN (www.cern.ch)
 * Author: Alessandro Rubini <rubini@gnudd.com>
 *
 * This program is free software; you can redistribute it and/or modify
@@ -10,7 +10,11 @@
 */
 #ifndef __WR_NIC_HARDWARE_H__
 #define __WR_NIC_HARDWARE_H__
+#if (!defined WR_IS_NODE) && (!defined WR_IS_SWITCH)
+#error "WR_NODE and WR_SWITCH not defined!"
+#endif

+#if WR_IS_SWITCH
 /* This is the clock used in internal counters. */
 #define REFCLK_FREQ (125000000 / 2)
 #define NSEC_PER_TICK (NSEC_PER_SEC / REFCLK_FREQ)
@@ -53,6 +57,70 @@
 #define FPGA_SIZE_VIC	0x00001000
 #define FPGA_BASE_TS	0x10051000
 #define FPGA_SIZE_TS	0x00001000
+#endif /* WR_IS_SWITCH */
+
+#if WR_IS_NODE 
+/* This is the clock used in internal counters. */
+#define REFCLK_FREQ (125000000)
+#define NSEC_PER_TICK (NSEC_PER_SEC / REFCLK_FREQ)
+
+/* The interrupt is one of those managed by our WRVIC device */
+#define WRN_IRQ_BASE		0 /* FIXME: relative to pci dev */
+#define WRN_IRQ_NIC		(WRN_IRQ_BASE + 0)
+#define WRN_IRQ_TSTAMP		/* (WRN_IRQ_BASE + 1) -- not used here */
+//#define WRN_IRQ_PPSG		(WRN_IRQ_BASE + )
+//#define WRN_IRQ_RTU		(WRN_IRQ_BASE + )
+//#define WRN_IRQ_RTUT		(WRN_IRQ_BASE + )
+
+/*
+ *	spec-wr-nic memory map (from SDB dump):
+ *
+ *  00000651:e6a542c9 WB4-Crossbar-GSI
+ *  0000ce42:00000011 WR-CORE             (bridge: 00000000)
+ *     00000651:e6a542c9 WB4-Crossbar-GSI
+ *     0000ce42:66cfeb52 WB4-BlockRAM        (00000000-00015fff)
+ *     00000651:eef0b198 WB4-Bridge-GSI      (bridge: 00020000)
+ *        00000651:e6a542c9 WB4-Crossbar-GSI
+ *        0000ce42:ab28633a WR-Mini-NIC         (00020000-000200ff)
+ *        0000ce42:650c2d4f WR-Endpoint         (00020100-000201ff)
+ *        0000ce42:65158dc0 WR-Soft-PLL         (00020200-000202ff)
+ *        0000ce42:de0d8ced WR-PPS-Generator    (00020300-000203ff)
+ *        0000ce42:ff07fc47 WR-Periph-Syscon    (00020400-000204ff)
+ *        0000ce42:e2d13d04 WR-Periph-UART      (00020500-000205ff)
+ *        0000ce42:779c5443 WR-Periph-1Wire     (00020600-000206ff)
+ *        0000ce42:779c5443 WR-Periph-1Wire     (00020700-000207ff)
+ *  0000ce42:00000012 WR-NIC              (00040000-0005ffff)
+ *  0000ce42:00000013 WB-VIC-Int.Control  (00060000-000600ff)
+ *  0000ce42:00000014 WR-TXTSU            (00061000-000610ff)
+ *  000075cb:00000002 WR-DIO-Core         (bridge: 00062000)
+ *     00000651:e6a542c9 WB4-Crossbar-GSI
+ *     0000ce42:779c5443 WR-1Wire-master     (00062000-000620ff)
+ *     0000ce42:123c5443 WB-I2C-Master       (00062100-000621ff)
+ *     0000ce42:441c5143 WB-GPIO-Port        (00062200-000622ff)
+ *     000075cb:00000001 WR-DIO-Registers    (00062300-000623ff)
+ * 
+ */
+
+/* This is the base address of memory regions (gennum bridge, bar 0) */
+#define FPGA_BASE_LM32	0x00000000
+#define FPGA_SIZE_LM32	0x00016000
+
+#define FPGA_BASE_NIC	0x00020000
+#define FPGA_SIZE_NIC	0x00000100
+
+#define FPGA_BASE_EP	0x00020100
+#define FPGA_SIZE_EP	0x00000100
+#define FPGA_SIZE_EACH_EP	0x100 /* There is one only */
+
+#define FPGA_BASE_PPSG	0x00020300
+#define FPGA_SIZE_PPSG	0x00000100
+
+#define FPGA_BASE_VIC	0x00060000 /* not used here */
+#define FPGA_SIZE_VIC	0x00000100
+#define FPGA_BASE_TS	0x00061000
+#define FPGA_SIZE_TS	0x0000 100
+#endif /* ifdef WR_IS_NODE */
+

 enum fpga_blocks {
 	WRN_FB_NIC,
@@ -65,7 +133,8 @@ enum fpga_blocks {
 /* In addition to the above enumeration, we scan for those many endpoints */
 #if WR_IS_NODE
 #  define WRN_NR_ENDPOINTS		1
-#else
+#endif
+#if WR_IS_SWITCH
 #  define WRN_NR_ENDPOINTS		18
 #endif


--- a/userspace/snmpd/wrsDate.c
+++ b/userspace/snmpd/wrsDate.c
@@ -14,6 +14,10 @@
 #include <sys/stat.h>

 #include "wrsSnmp.h"
+/* defines for nic-hardware.h */
+#define WR_SWITCH
+#define WR_IS_NODE 0
+#define WR_IS_SWITCH 1
 #include "../../kernel/wr_nic/nic-hardware.h"
 #include "../../kernel/wbgen-regs/ppsg-regs.h"