Commit 00f3e992 authored by Maciej Lipinski's avatar Maciej Lipinski

scb_top_sythesis:bug fixing and making the swcore to synthesize

parent 1844c34e
......@@ -113,12 +113,8 @@ begin
-- Input buffering
--------------------------------------
clkin1_buf : IBUFG
port map
(O => clkin1,
I => CLK_IN1);
CLKIN1 <= clk_in1;
-- Clocking primitive
--------------------------------------
......
This diff is collapsed.
......@@ -181,6 +181,7 @@ architecture Behavioral of scb_top_synthesis is
clk_dmtd_i : in std_logic;
clk_sys_i : in std_logic;
clk_sys_o : out std_logic;
clk_swc_mpm_core_i : in std_logic;
cpu_wb_i : in t_wishbone_slave_in;
cpu_wb_o : out t_wishbone_slave_out;
cpu_irq_n_o : out std_logic;
......
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