misc: setup git submodules and update doc

c1e5f0d7 · Benoit Rat · a58b4bf1 · c1e5f0d7 · c1e5f0d7 · c1e5f0d7
Commit c1e5f0d7 authored Apr 04, 2013 by Benoit Rat
9 changed files
--- a/.gitmodules
+++ b/.gitmodules
+[submodule "ip_cores/wr-cores"]
+	path = ip_cores/wr-cores
+	url = git@ohwr.org:hdl-core-lib/wr-cores.git
+[submodule "ip_cores/wr-switch-hdl"]
+	path = ip_cores/wr-switch-hdl
+	url = git@ohwr.org:white-rabbit/wr-switch-hdl.git
+[submodule "ip_cores/general-cores"]
+	path = ip_cores/general-cores
+	url = git@ohwr.org:hdl-core-lib/general-cores.git
+[submodule "ip_cores/gn4124-core"]
+	path = ip_cores/gn4124-core
+	url = git@ohwr.org:hdl-core-lib/gn4124-core.git
--- a/0001-Comment_ECA_for_Xilinx.patch
+++ b/0001-Comment_ECA_for_Xilinx.patch
+diff --git ip_cores/wr-cores/Manifest.py ip_cores/wr-cores/Manifest.py
+index 72b6614..e2064f7 100644
+--- ip_cores/wr-cores/Manifest.py
+++ ip_cores/wr-cores/Manifest.py
+@@ -9,7 +9,7 @@ modules =  {"local" :
+ 												"modules/wr_endpoint",
+ 												"modules/wr_pps_gen",
+ 												"modules/wr_dacs",
+-												"modules/wr_eca",
+#												"modules/wr_eca",
+ 												"modules/wr_tlu",
+ 												"modules/wrc_core",
+ 												"platform" ],
--- a/Manifest.py
+++ b/Manifest.py
 fetchto = "ip_cores"

-modules =  { "local" : ["modules/wrsw_dio"],
-             "git" : ["git://ohwr.org/white-rabbit/wr-switch-hdl.git",
-		      "git://ohwr.org/hdl-core-lib/general-cores.git::no_coregen"],
-             "svn" : "http://svn.ohwr.org/gn4124-core/trunk/hdl/gn4124core/rtl"
+modules =  { "local" : ["modules/wrsw_dio",
+		      "ip_cores/wr-switch-hdl",
+		      "ip_cores/general-cores",
+		      "ip_cores/gn4124-core/hdl/gn4124core/rtl"]
           }


--- a/doc/wr-nic.md
+++ b/doc/wr-nic.md
@@ -147,6 +147,20 @@ are going to embedded into our *HDL* gateware. It is not needed to recompile it,
 lm32 behaviour you can look at the [WRPC](#wrpc-sw-lm32-firmware) section to check how to build it.


+HDLMake
+-------------
+
+In order to synthetize the HDL for wr-nic you need to have installed the `hdlmake` tool.
+For more information on how to install and use it, you can look at the [hdlmake.pdf]
+
+To generate the wr-nic bitstream we have used latest commit in the isyp branch.
+
+	cd <path-hdl-make>
+	git checkout 20c784d
+
+> Notes: the synthetization can work with other hdlmake verison but if you obtain any errors we
+recommand you to use the same version as our.
+
 	
 WR-NIC (HDL-gateware)
 ----------------------
@@ -159,15 +173,19 @@ the wrpc-sw (`wrc.ram` file) embeded inside.
 ## Checkout the code
 git clone git://ohwr.org/white-rabbit/wr-nic.git
 cd wr-nic
-git checkout -b wr-nic-v1.0 wr-nic-v1.0
+##git checkout -b wr-nic-v1.0 wr-nic-v1.0
+
+## Create and update the submodules
+git submodule init
+git submodule update
+patch -p0 < 0001-Comment_ECA_for_Xilinx.patch

 ## Go to the main directory
 cd wr-nic/syn/spec/

 ## Synthetize using hdlmake
-hdlmake --fetch
-hdlmake --fetch
-hdlmake -l
+hdlmake --make-ise --ise-proj
+make
 ~~~~~~~~~~~	

 you should finally obtain the bitstream to import in your fmc driver folder.

--- a/ip_cores/.gitignore
+++ b/ip_cores/.gitignore
-*
--- a/general-cores @ 18fa7851
+++ b/general-cores @ 18fa7851
+Subproject commit 18fa7851a47d149d5562a92e0fa36b05286628e0
--- a/gn4124-core @ 3844fe59
+++ b/gn4124-core @ 3844fe59
+Subproject commit 3844fe59dab7b66f46698e348c16e252f93e4cc3
--- a/wr-cores @ fd76aee4
+++ b/wr-cores @ fd76aee4
+Subproject commit fd76aee4277f68116169e6a6fca232de28b752bf
--- a/wr-switch-hdl @ ea1c7152
+++ b/wr-switch-hdl @ ea1c7152
+Subproject commit ea1c71522755f7b58bf44d81a67b3c71e02cef8b