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Commit b4837616 authored by Rafael Rodriguez's avatar Rafael Rodriguez
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updated software test with new memory map

parent 1c585990
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Showing with 43 additions and 13 deletions
software_test_dio_core/dio_fmc.py
View file @ b4837616
......@@ -11,6 +11,19 @@ from eeprom_24aa64 import *
from onewire import *
from ds18b20 import *
class VIC_irq:
def __init__(self, bus, base):
self.bus = bus;
self.base = base;
def set_reg(self, adr, value):
self.bus.iwrite(0, self.base + adr, 4, value)
def get_reg(self, adr):
return self.bus.iread(0, self.base + adr, 4)
class CDAC5578:
CMD_POWER_ON = 0x40
......@@ -71,7 +84,7 @@ class CFmcDio:
self.bus = bus;
self.gpio = CGPIO(bus, base + self.BASE_GPIO)
if(not self.fmc_present()):
raise DeviceNotFound("FMC", 0x80000)
raise DeviceNotFound("FMC", 0x60000)
self.i2c = COpenCoresI2C(bus, base + self.BASE_I2C, self.I2C_PRESCALER)
self.onewire = COpenCoresOneWire(self.bus, base + self.BASE_ONEWIRE, 624/2, 124/2)
self.eeprom = C24AA64(self.i2c, self.I2C_ADDR_EEPROM);
......@@ -119,13 +132,13 @@ class CFmcDio:
return self.ds1820.read_temp(serial_number)
def set_reg(self, adr, value):
self.bus.iwrite(0, 0x80000 + self.BASE_REGS + adr, 4, value)
self.bus.iwrite(0, 0x60000 + self.BASE_REGS + adr, 4, value)
def get_reg(self, adr):
return self.bus.iread(0, 0x80000 + self.BASE_REGS + adr, 4)
return self.bus.iread(0, 0x60000 + self.BASE_REGS + adr, 4)
def get_reg_long(self, adr):
return self.bus.iread(0, 0x80000 + self.BASE_REGS + adr, 8)
return self.bus.iread(0, 0x60000 + self.BASE_REGS + adr, 8)
def wait_irq_spec(self):
return self.bus.irqwait()
......
software_test_dio_core/test_pulse.py
View file @ b4837616
......@@ -23,14 +23,15 @@ def main(default_directory="."):
print "(-------------STARTING TEST-----------------)"
spec = rr.Gennum()
gennum = gn4124.CGN4124(spec, GN4124_CSR)
dio = CFmcDio(spec, 0x80000)
dio = CFmcDio(spec, 0x60000)
print "(3 devices expected)"
print
print ("FMC temperature: %3.3f°C" % dio.get_temp())
print "(expected room or computer temperature)"
print
print "(------------CONFIGURING LEMOS--------------)"
print "(------------CONFIGURING DIO CHANNELS--------------)"
print "Value of LEMOs with all drivers enabled and terminations disabled",
for lemon in range(5):
dio.set_term(lemon, 0)
......@@ -38,6 +39,27 @@ def main(default_directory="."):
dio.set_in_threshold(lemon,30)
print "Input threshold set to an intermediate level ({}).".format(dio.get_in_threshold(0))
print "(------------CONFIGURING INTERRUPTS--------------)"
print "(DIO Interrupts)"
# DIO Interrupts
dio.set_reg(0x64, 0x1f) # Interrupts when the fifos have datas (UTC time from the pulse stamper)
mask_irq = dio.get_reg(0x68)
print "mask_irq =>", mask_irq
status_irq = dio.get_reg(0x6c)
print "STATUS IRQ =>", status_irq
# DIO Interrupts
print "(VIC Interrupts)"
VIC = VIC_irq(spec, 0x40000)
VIC.set_reg(0x0, 0x3) # control register
control_irq_vic = VIC.get_reg(0x0)
print "control_irq_vic =>", control_irq_vic
VIC.set_reg(0x8, 0x3) # enable register
mask_irq_vic = VIC.get_reg(0x10)
print "mask_irq_vic =>", mask_irq_vic
print
print "(------------CONFIGURING TRIG UTC TIME FOR EACH LEMO--------------)"
print "Note: The dummy time core is already running after configuring the fpga"
......@@ -138,15 +160,10 @@ def main(default_directory="."):
print "cycles DIO 4 =>", cycles
print
status_irq_vic = dio.get_reg(0x4)
print "STATUS VIC IRQ =>", status_irq_vic
#dio.set_reg(0x64, 0x1f)
# mask_irq = dio.get_reg(0x68)
# print "mask_irq =>", mask_irq
# status_irq = dio.get_reg(0x6c)
# print "STATUS IRQ =>", status_irq
#kbhit.getch()
# print "Waiting irq ..."
# gennum.wait_irq()
......
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