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SVEC BST Receiver
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Tom Levens
SVEC BST Receiver
Commits
04dfd72f
Commit
04dfd72f
authored
May 06, 2019
by
Tom Levens
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README.md
README.md
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svec_top.vhd
hdl/rtl/svec_top.vhd
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-1
update_sdb.sh
hdl/syn/update_sdb.sh
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README.md
View file @
04dfd72f
#
UA9
BST Receiver
#
SVEC
BST Receiver
This is the gateware for the UA9 BST Receiver. It is based on the following
OHWR hardware components:
This is the gateware for the SVEC BST Receiver, initially designed as a trigger
receiver for the UA9 experiment at CERN. It is based on the following OHWR
hardware components:
*
**SVEC:**
https://ohwr.org/project/svec
*
**TTC_FMC:**
https://ohwr.org/project/optical-cdr-fmc
...
...
@@ -16,7 +17,8 @@ the front-panel LEMO outputs:
## Hardware configuration
The TTC_FMC should be installed in FMC slot 1 (bottom) on the SVEC.
The TTC_FMC should be installed in FMC slot 1 (bottom) on the SVEC. Note that
only V3 of the TTC_FMC is supported.
## Building the gateware
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hdl/rtl/svec_top.vhd
View file @
04dfd72f
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@@ -10,7 +10,7 @@
--
-- version: see sdb_meta_pkg.vhd
--
-- description: SVEC top level for the
UA9
BST Trigger Receiver.
-- description: SVEC top level for the BST Trigger Receiver.
--
-- dependencies:
--
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hdl/syn/update_sdb.sh
View file @
04dfd72f
...
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@@ -4,7 +4,7 @@ SYN_MODULE=svec_top
SYN_TOOL_NAME
=
ISE
SYN_TOOL_VERSION
=
14.7
NAME
=
ua9
-bst-receiver
NAME
=
svec
-bst-receiver
VENDOR_ID
=
CE42
VERSION
=
1.0
...
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