FMC-masterFIP is an interface card for the WorldFIP network in an LPC FMC form-factor.
It is used as the physical layer interface of the masterFIP project.

Top view of the masterFIP board*

The main components of the FMC-masterFIP board are:

• The FielDrive bus driver and FieldTR insulating transformer, both developed and sold by the company Alstom.
• A Lemo-0 connector, optionally used for the reception of an input synchronization trigger pulse, usually from CERN’s timing board CTRI.
• An EEPROM chip, loaded with IPMI FRU information (during PTS testing) so as to comply with the FMC standard.
• A 1-wire thermometer-unique-id-chip.

The schematics of the board, drawn in Altium, are available at CERN’s EDMS. As the following table shows, three versions of the board have been designed.
A list of issues that were being identified and led to the development of a new version is available in the issues tab of this project.
Different board executions exist depending on the WorldFIP communication speed: 31.25kbps, 1Mbps, 2.5Mbps, and 5Mbps; a set of ten components differentiates the board executions.

IMPORTANT NOTE: There is an exception to the ANSI/VITA.57 standard:

• The FieldTR transformer is ~1 mm higher than what the standard permits. Due to that, the carrier board should have a cut out under the FMC board (see e.g. the SPEC board). While it is possible to mount FMC-masterFIP on a carrier without the cutout, it may create undesired mechanical stress (see mounting example of the FMC-nanoFIP that has the same problem FMC-nanoFIP on SVEC carrier).

Contact

Eva Gousiou

Licences

• CERN Open Hardware Licence v1.2

Tags

FMC FMC Module WorldFIP TRL9