Commit 47d692a8 authored by Christos Gentsos's avatar Christos Gentsos Committed by Dimitris Lampridis

debug (vsim-8630) dut_env.sv(128): Infinity results from division operation

parent a6371926
Pipeline #151 passed with stage
in 8 minutes and 23 seconds
......@@ -15,6 +15,10 @@ sim_pre_cmd = "EXTRA2_CFLAGS='-DSIMULATION' make -C ../../../software/firmware"
include_dirs = [
"../include",
fetchto + "/ddr3-sp6-core/hdl/sim/micron_ddr3_bfm",
fetchto + "/general-cores/modules/wishbone/wb_lm32/src",
fetchto + "/general-cores/modules/wishbone/wb_spi",
fetchto + "/urv-core/rtl",
fetchto + "/gn4124-core/hdl/sim/gn4124_bfm",
fetchto + "/general-cores/sim",
fetchto + "/mock-turtle/hdl/testbench/include",
......
......@@ -90,7 +90,7 @@ module simple_tdc_driver
val[27:26] = t.channel & 2'b11;
val[25:18] = start;
val[17] = 1'b1;
val[16:0] = (t.ts - start_time) / 81ps;
val[16:0] = (t.ts - start_time) / 81.0ps;
$display("[DUT] <%t> TDC: pulse at %t for channel %0d (start #0x%x, time_data 0x%x, start_time %t)",
$realtime, t.ts, t.channel, start, val[16:0], start_time);
......@@ -101,7 +101,7 @@ module simple_tdc_driver
val[27:26] = t.channel & 2'b11;
val[25:18] = start;
val[17] = 1'b0;
val[16:0] = (t.duration + t.ts - start_time) / 81ps;
val[16:0] = (t.duration + t.ts - start_time) / 81.0ps;
fifos[t.channel / 4].push_back(val);
......@@ -125,7 +125,7 @@ module simple_tdc_driver
if (restart_pulse) begin
start = 1;
restart_pulse = 0;
start01 = ($time - restart_time) / 81ps;
start01 = ($time - restart_time) / 81.0ps;
end
else begin
start_time = $time;
......
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